LC7872E Datasheet, PDF (3/17 Pages) Sanyo Semicon Device – CD Graphics Decoder

LC7872E
Specifications
Absolute Maximum Ratings at Ta = 25°C, V_SS = 0 V
Parameter
Maximum supply voltage
Maximum input voltage
Maximum output voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
V_DD max
V_IN max
V_OUT max
Pd max
Topr
Tstg
Conditions
Ratings
Unit
V_SS – 0.3 to +7.0
V
V_SS – 0.3 to V_DD + 0.3
V
V_SS – 0.3 to V_DD + 0.3
V
300 mW
–30 to +85 °C
–40 to +125 °C
Allowable Operating Ranges at Ta = 25°C, V_SS = 0 V
Parameter
Supply voltage
Input high level voltage
Input low level voltage
High level clock pulse width
Low level clock pulse width
Data setup time
Data hold time
CE wait time
CE setup time
CE hold time
DO setup time
Input frequency
Input amplitude
Reset pulse width
Symbol
V_DD
V_IH (1)
V_IH (2)
V_IH (3)
V_IL (1)
V_IL (2)
V_IL (3)
t_øH
t_øL
t_DS
t_DH
t_CP
t_CS
t_CH
t_DOS
fin (1)
fin (2)
fin (3)
fin (4)
V_IN
t_WRES
Conditions
V_DD1, V_DD2
RESET
SFSY, PW, SBSY, CE, DI, CL, MUTE, DB0 to DB3,
PALID, HRESET, VRESET, N/P1, N/P2, SON
S1, S2, CB, TEST, TEST1, LINE, DEN
RESET
SFSY, PW, SBSY, CE, DI, CL, MUTE, DB0 to DB3,
PALID, HRESET, VRESET, N/P1, N/P2, SON
S1, S2, CB, TEST, TEST1, LINE, DEN
CL: Figure 1
CL: Figure 1
CL, DI: Figure 1
CL, DI: Figure 1
CE, CL: Figure 1
CE, CL: Figure 1
CE, CL: Figure 1
CL, DO: Figure 1
XIN1
XIN2
NTSC mode
4FSC2
PAL mode
NTSC mode
FSCIN
PAL mode
XIN1, XIN2, 4FSC2, FSCIN:
sine wave, capacitive coupling
RESET
Electrical Characteristics at Ta = 25°C, V_SS = 0 V, V_DD = 5 V
min
typ
4.5
0.7 V_DD
2.2
0.8 V_DD
V_SS
V_SS
V_SS
400
400
200
200
400
400
400
130
14.31818
17.734476
14.31818
17.734476
3.58
4.43
max
5.5
V_DD
V_DD
V_DD
0.3 V_DD
0.8
0.2 V_DD
300
0.3
5
400
Unit
V
V
V
V
V
V
V
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
MHz
MHz
Vp-p
ns
Parameter
Current drain
Input high level current
Input low level current
Output high level voltage
Symbol
Conditions
min
typ
max
Unit
I_DD (1) V_DD1
24
40
mA
I_DD (2) V_DD2
12
20
mA
S1, S2, SFSY, PW, SBSY, CE, DI, CL, MUTE, LINE,
I_IH (1)
HRESET, VRESET, N/P1, N/P2, RESET, SON:
V_IN = V_DD
5
µA
I_IH (2) CB, TEST, TEST1, DEN: V_IN = V_DD
30
100
200
µA
S1, S2, SFSY, PW, SBSY, CE, DI, CL, MUTE, LINE,
V_IL (1) HRESET, VRESET, N/P1, N/P2, RESET, SON:
–5
µA
V_IN = V_SS
V_IL (2) PALID: V_IN = V_SS
–200
–100
–30
µA
SBCK, WE, RAS, CAS, OE, A0 to A7, DB0 to DB3,
V_OH
CDGM, TRANS0 to TRANS5, VSYNC, YS, CSYNC,
EFLG, FSX, FSC: I_O = –0.5 mA
V_DD – 1
V_DD
V
Continued on next page.
No. 4868-3/17