LC7872E Datasheet, PDF (12/17 Pages) Sanyo Semicon Device – CD Graphics Decoder

LC7872E
• LC7861N/67 interface (Pin names in parentheses are DSP pins.)
• LC7868/69/681 interface
Identical to the LC7861N/67 interface except that the SBCK polarity is reversed (the shift occurs on the rising
edge).
3. DRAM Interface; A0 to A7, DB0 to DB3, RAS, CAS, WE, OE
The LC7872E uses an external 64-kword × 4-bit DRAM.
4. Display Format; DEN, N/P1, N/P2, CSYNC, VRESET, HRESET, YS, VIDEO, PALID and TRANS0 to TRANS5
• Data to which error detection and correction has been applied is encoded by the RGB encoder and the 8-bit D/A
converter output is output from the VIDEO pin. This circuit handles both NTSC and PAL formats and either mode
can be specified using the N/P pins. See item 1 for details on the pin states for the NTSC and PAL specifications.
• The 4FSC2, FSCIN, YS, VRESET, HRESET, PALID and TRANS0 to TRANS5 pins are used in superimposition
mode. The image may be disrupted if the VRESET and HRESET signals are not synchronized with 4FSC2.
The PALID pin is controlled in PAL mode, and is used to match the LC7872E burst signal to the burst component
of the external video signal. When this pin is high, the phase of the burst signal changes every horizontal period,
and when this pin is low, the phase does not change.
The YS pin outputs a control signal used to switch between an external video signal and the LC7872E video signal.
The output conditions for this signal are set by the 2N byte command input registers 0, E, F, and G. The pins
TRANS0 through TRANS5 output signals according to the define transparency instruction.
• The DEN pin is a display control pin. The internal font data is output when DEN is low and the color data set up in
the registers is used when DEN is high. The default state is blue.
No. 4868-12/17