LC878496PB Datasheet, PDF (27/29 Pages) Sanyo Semicon Device – 8-bit ETR Microcontroller

LC878496PB/C8PB/G0PB/G1PB/J2PB/J3PB/M4PB/P6PB/P7PB
VDDx, VSSx Terminal condition x=2 to 4
• It is necessary to place capacitors between VDDx and VSSx as describe below.
• Place capacitors as close to VDDx and VSSx as possible.
• Place capacitors so that the length of each terminal to the each leg of the capacitor be equal (L5 = L5’).
• Capacitance of C5 must be more than 0.1μF.
• Use thicker pattern for VDDx and VSSx.
L5
VSSx
C5
VDDx
L5’
VDD
RRES
(Note) Select CRES and RRES value to assure that reset is
generated after the VDD becomes higher than the
minimum operating voltage.
RES
Recommended value
CRES
CRES: 0.47μF
RRES: 270kΩ
Figure 1 Reset Circuit
No.A1795-27/29