LC878496PB Datasheet, PDF (16/29 Pages) Sanyo Semicon Device – 8-bit ETR Microcontroller

LC878496PB/C8PB/G0PB/G1PB/J2PB/J3PB/M4PB/P6PB/P7PB
Continued from preceding page.
Parameter
Symbol
Pins/
Remarks
Conditions
VDD[V]
min
Current drain
during
Intermittent for
clock mode
IDDCLOCK(1)
VDD1
=VDD2
=VDD3
=VDD4
• Intermittent for clock mode
• Each 500ms is shifted to a normal mode,
and 20 steps are executed.
• FmCF=0Hz (oscillation stopped)
• FmX'al=32.768kHz by crystal oscillation
4.5 to 5.5
IDDCLOCK(2)
mode.
• System clock set to 32.768kHz side.
• Internal RC oscillation stopped
• Frequency variable RC oscillation stopped
3.0 to 4.5
• 1/1 frequency division ratio.
Specification
typ
max
unit
250
500
μA
200
400
Note 7-1: The consumption current value includes none of the currents that flow into the output Tr and internal pull-up
resistors.
General-purpose I/O port "L" output when the above-mentioned data is measured
However, the P0 port is an input setting because of the mode setting
UART(Full Duplex) Operating Conditions at Ta = -40°C to +85°C, VSS1 = VSS2 = VSS3 = VSS4 = 0V
Parameter
Symbol
Pins/
Remarks
Conditions
VDD[V]
min
Specification
typ
max
Clock rate
UBR, UBR2 UTX1(P32),
RTX1(P33),
UTX2(P33),
3.0 to 5.5
16/3
8192/3
RTX2(P34)
unit
tCYC
Data length: 7, 8, and 9 bits ( LSB first )
Stop bits: 1 bit (2-bit in continuous data transmission)
Parity bits: Non
Example of Continuous 8-bit Data Transmission Mode Processing (First Transmit Data=55H)
Start bit
Start of
transmission
Transmit data (LSB first)
Stop bit
End of
transmission
UBR,
UBR2
Example of Continuous 8-bit Data Reception Mode Processing (First Receive Data=55H)
Start bit
Start of
reception
Received data (LSB first)
Stop bit
End of
reception
UBR,
UBR2
No.A1795-16/29