LC878496PB Datasheet, PDF (26/29 Pages) Sanyo Semicon Device – 8-bit ETR Microcontroller

LC878496PB/C8PB/G0PB/G1PB/J2PB/J3PB/M4PB/P6PB/P7PB
VDD1, VSS1 Terminal condition
It is necessary to place capacitors between VDD1 and VSS1 as describe below.
• Place capacitors as close to VDD1 and VSS1 as possible.
• Place capacitors so that the length of each terminal to the each leg of the capacitor be equal (L1 = L1’, L2 = L2’).
• Place high capacitance capacitor C1 and low capacitance capacitor C2 in parallel.
• Capacitance of C2 must be more than 0.1μF.
• Please mount a suitable capacitor about C1.
• Use thicker pattern for VDD1 and VSS1.
L2
L1
VSS1
C1
C2
L1’
L2’
VDD1
VREG, VSS3 Terminal condition
It is necessary to place capacitors between VREG and VSS3 as describe below.
• Place capacitors as close to VREG and VSS3 as possible.
• Place capacitors so that the length of each terminal to the each leg of the capacitor be equal (L4 = L4’).
• Capacitance of C4 must be more than 1μF to 10μF.
• Use thicker pattern for VREG and VSS3.
L4
VSS3
C4
VREG
L4’
No.A1795-26/29