LV24100LP Datasheet, PDF (11/18 Pages) Sanyo Semicon Device – Bi-CMOS IC FM and AM Tuner IC for Small Portable Equipment

LV24100LP
Block 1, Register 05h-IF_OSC-IF Oscillator Register(Write-only)
7
6
5
4
3
2
IFOSC[7:0]
Bit 7-0:
IFOSC[7:0]: DAC value to control the IF oscillator
Note: Positive DAC control (i.e. the frequency increases with the register’s value)
Block 1, Register 06h-CNT_CTRL-Counters Control Register(Write-only)
7
6
5
4
3
CNT1_CLR
CTAB2
CTAB1
CTAB0
SWP_CNT_L
Bit 7:
Bit 6-4:
Bit 3:
Bit 2:
Bit 1:
Bit 0:
CNT1_CLR: Clear counter 1 bit
0 = Normal mode
1 = Clear and keep counter 1 in reset mode
CTAB[2:0]: Tab select for counter 2 measuring interval bits
Value Dec.
Stop value
000b
0
Stop after 2 counts
001b
1
Stop after 8 counts
010b
2
Stop after 32 counts
011b
3
Stop after 128 counts
100b
4
Stop after 512 counts
101b
5
Stop after 2048 counts
110b
6
Stop after 8192 counts
111b
7
Stop after 32768 counts
SWP_CNT_L: Swap counter 1 and counter 2 bit(Active low)
0 = Clock source 1 to counter 2, clock source 2 to counter 1(swapping)
1 = Clock source 1 to counter 1, clock source 2 to counter 2(no swap)
CNT_EN: Enable the currently selected counter bit
0 = Disable counter(stop counting)
1 = Enable counter(counting mode)
CNT_SEL: counter select bit
0 = Select counter 1 for measurement
1 = Select counter 2 for measurement
CNT_SET: Set counters bit
0 = Normal mode
1 = Set both counter 1 and counter 2 to FFFFh and keep them set
2
CNT_EN
Block 1, Register 08h-IRQ_MSK-Interrupt Mask Register(Write-only)
7
6
5
4
3
Reserved
IM_MS
Reserved
IRQ_LVL
Bit 7:
Bit 6:
Bit 5:
Bit 4:
Bit 3:
Bit 2:
Bit 1:
Bit 0:
Reserved: Must be programmed with 0.
IM_MS: Mono/Stereo interrupt mask bit
0 = Disable mono/stereo change interrupt
1 = Enable mono/stereo change interrupt
Reserved: Must be programmed with 0.
Reserved: Must be programmed with 0.
IRQ_LVL: Interrupt level select bit
0 = Drive DATA-line from low to high when interrupt occurs(active high)
1 = Drive DATA-line from high to low when interrupt occurs(active low)
IM_AFC: AFC out of range interrupt mask bit
0 = Disable AFC out of range interrupt
1 = Enable AFC out of range interrupt
IM_FS: Field strength change interrupt mask bit
0 = Disable field strength change interrupt
1 = Enable field strength change interrupt
IM_CNT2: Counter 2 counting done interrupt mask bit
0 = Disable counter 2 counting done interrupt
1 = Enable counter 2 counting done interrupt
2
IM_AFC
1
0
1
CNT_SEL
0
CNT_SET
1
IM_FS
0
IM_CNT2
No.A0194-11/18