LC88F58B0A Datasheet, PDF (11/25 Pages) Sanyo Semicon Device – FROM 128K byte, RAM 4096K byte on-chip 16-bit 1-chip Microcontroller

Pin Description
Pin Name
I/O
VDD
-
VSS
-
VLCD1 to 4
-
LCDVSS0,
-
LCDVSS1
CUP00, 01
-
OSC0 XT1
I
XT2
O
OSC1 CF1
I
CF2
O
PORT 0
I/O
P00 to P07
PORT 1
I/O
P10 to P17
PORT 2
I/O
P20 to P23
COM0 to COM7
O
COM8/SEG0 to
O
COM15/SEG7
SEG8 to SEG55
O
SEG56 to SEG71
I/O
RESB
I
TST
I/O
LC88F83B0A
Description
+ power supply pin
- power supply pin
LCD bias power port (capacitor connection port)
LCD power supply pin
Switching pin for generating LCD driving voltage
Connect capacitor between both ports.
Oscillator circuit for system clock (low speed)
• 32.768kHz crystal oscillator and capacitor for oscillation connection
• XT1: Resistor connection for RC oscillation (RC model)
Oscillator circuit for system clock (high speed)
• Ceramic oscillator and capacitor for oscillator connection
• CF1: Resistance connection for RC oscillator (RC model)
• 8-bit I/O port
• I/O specifiable in 1-bit units
• Shared pins
P00 to P05 : Interrupt function
P06: Timer 0 PWML output
P07: Timer 0 PWMH output
• 8-bit I/O port
• I/O specifiable in 1-bit units
• Shared pins
P10: SIO0 data output
P11: SIO0 data input/Bus I/O
P12: SIO0 Clock I/O
P13: Timer 3 PWML output
P14: Timer 3 PWMH output
P16: UART 2 receive
P17: UART 2 send
• 4-bit I/O port
• I/O specifiable in 1-bit units
P20 to P23: AD converter input ports (AN0 to AN3)
• Shared pins
P20: Timer 4 output
P21: Timer 5 output
• LCD common output port
• LCD common output port/segment output port
common output/segment output is switched according to the register.
• LCD segment output port
• LCD segment output port
• SEG71 to SEG56: General purpose Nch OD output/General purpose input
SEG71 to SEG56 can switch LCD output, a general-purpose Nch OD output, and a general-purpose input
(every 4 bits).
• SEG71 to SEG64: Interrupt function (every 4 bits)
Selecting sampling frequency for chattering removal (every 4 bits)
Level/edge selection (every 4 bits)
Hi/Low level or rise/fall selection (every 1 bit)
• SEG71 to SEG70: Timer 3 external input
• Input terminal for system initialization
It operates reset by the “LOW” input.
with pull-up resistor
• TEST pin
• On-chip debugger communication terminal
Used with pull-down or VSS
*Connect 100kΩ between this pin and VSS when on-chip debugger is used.
No.A1228-11/25