LC86F3G64A Datasheet, PDF (11/25 Pages) Sanyo Semicon Device – 8-bit 1-chip Microcontroller

LC86F3G64A
Notice for Use
• Input level of terminal RES at power on
Terminal RES must be held low for at least 200µs after the supply voltage exceeds the power supply lower limit.
Power supply
RES
200µs or more
VDD _limit
0V
• Difference between the Mask version and Flash version
1. The operation after release of reset: The mask version operates the program from the address 0 in the
program counter as soon as detecting the H level on the reset port.
The flash version operates the program from the address 0 in the program
counter after setting the option.
2. Current dissipation :
Please refer to the latest semiconductor news.
• Conditions during reset and after release of reset
Port options are set using Flash Memory data.
Port options are set internally within approximately 3ms after logic HIGH is applied to the RESET terminal. The
configuration of the port outputs change over the duration of this period. Then the Program Counter is set to 0 and
program execution begins.
During reset, and in the few hundred milliseconds after reset is released, the port options on certain of the ports will
not yet have been set. The conditions of the various ports during reset or on release of reset have been collected in
the following table. Please refer to it when analyzing circuits where these conditions apply.
Pins
P0
P1
P6
P7
P8
Options
Input: Without pull up MOS transistor
Output: N-channel open drain
Input: With pull up MOS transistor
Output: CMOS
Input: With programmable pull up MOS transistor
Output: N-channel open drain
Input: With programmable pull up MOS transistor
Output: CMOS
No options
Output: N-channel open drain
No options
Input: With programmable pull up MOS transistor
Output: N-channel open drain (P70)
CMOS (P71 - P73)
No options
Input: With programmable pull up MOS
Transistor (P83: without it)
Output: CMOS (P83: input only)
Condition during and on release of reset
Output -off
Input mode: High impedance
Output-off
During reset and in the first few hundred µs after reset is released,
the pull-up MOS transistor is OFF. Thereafter, set to input mode with
pull-up MOS Tr. ON
Output-off
Input mode: High impedance
Output -off
Input mode: High impedance
Output-off
Input mode: Pull up MOS transistor off
Output-off
Input mode: Pull up MOS transistor off
No.A0121-11/25