K4S643232F Datasheet, PDF (7/12 Pages) Samsung semiconductor – 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL

K4S643232F
CMOS SDRAM
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C, VIH(min)/VIL(max)=2.0V/0.8V)
Parameter
Operating Current
(One Bank Active)
Symbol
Test Condition
ICC1
Burst Length =1
tRC ≥ tRC(min), tCC ≥ tCC(min), Io = 0mA
CAS
Latency _-45
Speed
-50 -55 -60
Unit Note
-70
3
140 140 140 130 130
mA 2
2
110
Precharge Standby Current in ^ICC2P
power-down mode
ICC2PS
Precharge Standby Current
in non power-down mode
ICC2N
ICC2NS
CKE ≤ VIL(max), tCC = 15ns
CKE & CLK ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns
Input signals are changed one time during 30ns
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
2
mA
2
12
mA
7
Active Standby Current
in power-down mode
Active Standby Current
in non power-down mode
(One Bank Active)
ICC3P
ICC3PS
ICC3N
ICC3NS
CKE ≤ VIL(max), tCC = 15ns
CKE ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns
Input signals are changed one time during 30ns
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
4
mA
4
40
mA
35
Operating Current
(Burst Mode)
Refresh Current
Self Refresh Current
ICC4
Io = 0 mA, Page Burst
All bank Activated, tCCD = tCCD(min)
ICC5
tRC ≥ tRC(min)
ICC6
CKE ≤ 0.2V
3
180 170 160 150 140
mA 2
2
120
3
150 150 150 140 120
mA 3
2
120
2
mA 4
450
uA 5
Notes : _{1. Unless otherwise notes, Input level is CMOS(VIH/VIL=VDDQ/VSSQ) in LVTTL.}
2. Measured with outputs open.
3. Refresh period is 64ms.
4. K4S643232F-TC**
5. K4S643232F-TL**
Rev. 1.0 (Jan. 2002)
-7-