K4S561633C-RL Datasheet, PDF (7/8 Pages) Samsung semiconductor – 16Mx16 SDRAM 54CSP

K4S561633C-R(B)L/N/P
CMOS SDRAM
AC CHARACTERISTICS(AC operating conditions unless otherwise noted)
Parameter
Symbol
- 75
Min
Max
-1H
Min
Max
CLK cycle time
CAS latency=3
CAS latency=2 ^{tC C}
7.5
9.5
9.5
1000
9.5
1000
CAS latency=1
-
-
CAS latency=3
5.4
7
CLK to valid output delay CAS latency=2 tSAC
7
7
CAS latency=1
-
-
CAS latency=3
2.5
2.5
Output data hold time
CAS latency=2 tOH
2.5
2.5
CAS latency=1
-
-
CLK high pulse width
tC H
2.5
3
CLK low pulse width
tC L
2.5
3
Input setup time
tS S
2.0
2.5
Input hold time
tSH
1.0
1.5
CLK to output in Low-Z
tSLZ
1
1
CAS latency=3
5.4
7
CLK to output in Hi-Z
CAS latency=2 tSHZ
7
7
CAS latency=1
-
-
Notes :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
-1L
Min
Max
9.5
12
1000
25
7
8
20
2.5
2.5
2.5
3
3
2.5
1.5
1
7
8
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1
1,2
2
3
3
3
3
2
Note :
1. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life
is potentially at stake. Please contact to the memory marketing team in samsung electronics when considering the use of
a product contained herein for any specific purpose, such as medical, aerospace, nuclear, military, vehicular or undersea
repeater use.
Rev. 1.4 Dec. 2002