K4S561633C-RL Datasheet, PDF (3/8 Pages) Samsung semiconductor – 16Mx16 SDRAM 54CSP

K4S561633C-R(B)L/N/P
CMOS SDRAM
Package Dimension and Pin Configuration
< Bottom View^*1 >
< Top View^*2 >
E₁
987 6 54 3 21
A
B
C
D
E
F
G
H
J
54Ball(6x9) CSP
1
2
3
7
8
9
A
VSS DQ15 VSSQ VDDQ DQ0 VD D
B DQ14 DQ13 VDDQ VSSQ DQ2 DQ1
C DQ12 DQ11 VSSQ VDDQ DQ4 DQ3
D DQ10 DQ9 VDDQ VSSQ DQ6 DQ5
E
DQ8 N C VSS VD D LDQM DQ7
F UDQM CLK CKE CAS RAS WE
G
A12 A11 A9 BA0 BA1 CS
H
A8
A7
A6
A0
A1 A10
J
VSS
A5
A4
A3
A2
VDD
E
E/2
*2: Top View
Max. 0.20
A
A1
Encapsulant
b^z
*1: Bottom View
< Top View^*2 >
#A1 Ball Origin Indicator
Pin Name
CLK
CS
CKE
A0 ~ A 12
BA0 ~ BA1
RAS
CAS
WE
L(U)DQM
D Q0 ~ 15
VDD /VSS
VD D Q /V S S Q
Pin Function
System Clock
Chip Select
Clock Enable
Address
Bank Select Address
Row Address Strobe
Column Address Strobe
Write Enable
Data Input/Output Mask
Data Input/Output
Power Supply/Ground
Data Output Power/Ground
Symbol
A
A₁
E
E₁
D
D₁
e
b
z
Min
0.90
0.30
-
-
-
-
-
0.40
-
Typ
0.95
0.35
8.10
6.40
15.10
6.40
0.80
0.45
-
[Unit:mm]
Max
1.00
0.40
-
-
-
-
-
0.50
0.10
Rev. 1.4 Dec. 2002