K1S3216B1C Datasheet, PDF (6/10 Pages) Samsung semiconductor – 2Mx16 bit Uni-Transistor Random Access Memory

K1S3216B1C
Preliminary
UtRAM
AC OPERATING CONDITIONS
TEST CONDITIONS(Test Load and Test Input/Output Reference)
Input pulse level: 0.2 to Vcc-0.2V
Input rising and falling time: 5ns
Input and output reference voltage: 0.5 x VCC
Output load (See right): CL=50pF
Dout
CL
1. Including scope and jig capacitance
AC CHARACTERISTICS(Vcc=1.7~2.1V, TA=-40 to 85°C)
Parameter List
Symbol
Read
Write
Read Cycle Time
Address Access Time
Chip Select to Output
Output Enable to Valid Output
UB, LB Access Time
Chip Select to Low-Z Output
UB, LB Enable to Low-Z Output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
UB, LB Disable to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
UB, LB Valid to End of Write
Write Pulse Width
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
tRC
tAA
tCO
tOE
tBA
tLZ
tBLZ
tOLZ
tHZ
tBHZ
tOHZ
tOH
tWC
tCW
tAS
tAW
tBW
tWP
tWR
tWHZ
tDW
tDH
tOW
1. tWP(min)=70ns for continuous write operation over 50 times.
Speed Bins
70ns
85ns
Min
Max
Min
Max
70
-
85
-
-
70
-
85
-
70
-
85
-
35
-
40
-
70
-
85
10
-
10
-
10
-
10
-
5
-
5
-
0
25
0
25
0
25
0
25
0
25
0
25
5
-
5
-
70
-
85
-
60
-
70
-
0
-
0
-
60
-
70
-
60
-
70
-
55¹⁾
-
60¹⁾
-
0
-
0
-
0
25
0
25
30
-
35
-
0
-
0
-
5
-
5
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-6-
Revision 0.1
June 2003