English
Language : 

S3C4510B Datasheet, PDF (43/422 Pages) Samsung semiconductor – Samsungs S3C4510B 16/32-bit RISC microcontroller is a cost-effective, high-performance microcontroller solution for Ethernet-based systems.
S3C4510B
INSTRUCTION SET
3 INSTRUCTION SET
INSTRUCTION SET SUMMAY
This chapter describes the ARM instruction set and the THUMB instruction set in the ARM7TDMI core.
FORMAT SUMMARY
The ARM instruction set formats are shown below.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Cond 0 0 1 Opcode S
Rn
Rd
Operand2
Cond 0 0 0 0 0 0 A S
Rd
Rn
Rs
1001
Rm
Data processing/
PSR Transfer
Multiply
Cond 0 0 0 0 1 U A S RdHi
RnLo
Rn
1001
Rm
Multiply Long
Cond 0 0 0 1 0 B 0 0
Rn
Rd
00001001
Rm
Single data swap
Cond
Cond
Cond
Cond
000100101111111111110001
0 0 0 P U 0 WL
Rn
Rd
0 0 0 0 1SH1
0 0 0 P U 1 WL
Rn
Rd
Offset 1 S H 1
0 1 1 P U B WL
Rn
Rd
Offset
Rn
Rm
Offset
Branch and exchange
Halfword data transfer:
register offset
Halfword data transfer:
immediate offset
Single data transfer
Cond 0 1 1
1
Undefined
Cond 1 0 0 P U S W L
Rn
Register List
Block data transfer
Cond
Cond
Cond
Cond
Cond
101L
1 1 0 P U N WL
1 1 1 0 CP Opc
1 1 1 0 CP Opc L
1111
Rn
CRn
CRn
Offset
CRd
CP#
CRd
CP#
Rd
CP#
Ignored by processor
Offset
CP# 0 CRm
CP# 1 CRm
Branch
Coprocessor data
transfer
Coprocessor data
Operation
Coprocessor register
Transfer
Software Interrupt
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Figure 3-1. ARM Instruction Set Format
NOTE
Some instruction codes are not defined but do not cause the Undefined instruction trap to be taken, for
instance a Multiply instruction with bit 6 changed to a 1. These instructions should not be used, as their
action may change in future ARM implementations.
3-1