S6A0075 Datasheet, PDF (42/70 Pages) Samsung semiconductor – 100 SEG / 34 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD

S6A0075
100 SEG / 34 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
Read Data From RAM
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
1
1
D7
D6
D5
D4
D3
D2
D1
D0
Read binary 8-bit data from DDRAM/CGRAM/SEGRAM. The selection of RAM is set by the previous address set
instruction. If address set instruction of RAM is not performed before this instruction, the data that read first is
invalid, because the direction of AC is not determined. If you read RAM data several times without RAM address
set instruction before read operation, you can get correct RAM data from the second, but the first data would be
incorrect, because there is no time margin to transfer RAM data. In case of DDRAM read operation, cursor shift
instruction plays the same role as DDRAM address set instruction : it also transfer RAM data to output data
register. After read operation address counter is automatically increased/decreased by 1 according to the entry
mode. After CGRAM/SEGRAM read operation, display shift may not be executed correctly.
- In case of RAM write operation, after this AC is increased/decreased by 1 like read operation. In this time, AC
indicates the next address position, but you can read only the previous data by read instruction.
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