S6A0075 Datasheet, PDF (41/70 Pages) Samsung semiconductor – 100 SEG / 34 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD

100 SEG / 34 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0075
Set Scroll Quantity (RE = 1)
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
1
X
SQ5
SQ4
SQ3
SQ2
SQ1
SQ0
As set SQ5 to SQ0, horizontal scroll quantity can be controlled in dot units (refer to Table 12). In this case
S6A0075 execute dot smooth scroll from 1 to 48 dots.
SQ5
0
0
0
0
:
1
1
SQ4
0
0
0
0
:
0
1
Table 12. Scroll Quantity According to HDS bits
SQ3
0
0
0
0
:
1
X
SQ2
0
0
0
0
:
1
X
SQ1
0
0
1
1
:
1
X
SQ0
0
1
0
1
:
1
X
Function
No shift
Shift left by 1-dot
Shift left by 2-dot
Shift left by 3-dot
:
Shift left by 47-dot
Shift left by 48-dot
Read Busy Flag & Address
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
1
BF
AC6
AC5
AC4
AC3
AC2
AC1
AC0
This instruction shows whether S6A0075 is in internal operation or not. If the resultant BF is High, it means the
internal operation is in progress and you have to wait until BF to be low, and then the next instruction can be
performed. In this instruction you can read also the value of address counter.
Write Data to RAM
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
1
0
D7
D6
D5
D4
D3
D2
D1
D0
Write binary 8-bit data to DDRAM/CGRAM/SEGRAM. The selection of RAM from DDRAM, CGRAM, or
SEGRAM, is set by the previous address set instruction : DDRAM address set, CGRAM address set, SEGRAM
address set. RAM set instruction can also determines the AC direction to RAM. After write operation, the address
is automatically increased/decreased by 1, according to the entry mode.
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