DS_K6F2016U4E Datasheet, PDF (4/9 Pages) Samsung semiconductor – 128K x16 bit Super Low Power and Low Voltage Full CMOS Static RAM

K6F2016U4E Family
CMOS SRAM
RECOMMENDED DC OPERATING CONDITIONS¹⁾
Item
Supply voltage
Ground
Input high voltage
Input low voltage
Note:
1. TA=-40 to 85°C, otherwise specified.
2. Overshoot: Vcc+2.0V in case of pulse width ≤20ns.
3. Undershoot: -2.0V in case of pulse width ≤20ns.
4. Overshoot and undershoot are sampled, not 100% tested.
Symbol
Vcc
Vss
VIH
VIL
Min
2.7
0
2.2
-0.2³⁾
Typ
Max
Unit
3.0
3.3
V
0
0
V
-
Vcc+0.2²⁾
V
-
0.6
V
CAPACITANCE¹⁾ (f=1MHz, TA=25°C)
Item
Symbol
Input capacitance
CIN
Input/Output capacitance
CIO
1. Capacitance is sampled, not 100% tested.
Test Condition
VIN=0V
VIO=0V
Min
Max
Unit
-
8
pF
-
10
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Average operating current
Output low voltage
Output high voltage
Standby Current (CMOS)
Symbol
Test Conditions
ILI VIN=Vss to Vcc
ILO CS=VIH or OE=VIH or WE=VIL, VIO=Vss to Vcc
ICC1
Cycle time=1µs, 100%duty, IIO=0mA, CS≤0.2V,
LB≤0.2V or/and UB≤0.2V, VIN≤0.2V or VIN≥VCC-0.2V
Min Typ¹⁾ Max Unit
-1
-
1 µA
-1
-
1 µA
-
-
2 mA
ICC2 ^{Cycle time=Min, IIO=0mA, 100% duty, CS=VIL,}
LB=VIL or/and UB=VIL, VIN=VIL or VIH
70ns -
55ns -
-
20 mA
-
26 mA
VOL IOL = 2.1mA
-
- 0.4 V
VOH IOH = -1.0mA
2.4 -
-
V
Other input =0~Vcc
ISB1 1) CS≥Vcc-0.2V(CS controlled) or
2) LB=UB≥Vcc-0.2V, CS≤0.2V(LB/UB controlled)
- 0.5 10 µA
1. Typical values are measured at VCC=3.0V, TA=25°C and not 100% tested.
-4-
Revision 2.0
September 2001