K9W4G08U1M Datasheet, PDF (39/40 Pages) Samsung semiconductor – 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory

K9W4G08U1M K9W4G16U1M
K9K2G08Q0M K9K2G16Q0M
K9K2G08U0M K9K2G16U0M
FLASH MEMORY
READY/BUSY
The device has a R/B output that provides a hardware method of indicating the completion of a page program, erase and random
read completion. The R/B pin is normally high but transitions to low after program or erase command is written to the command regis-
ter or random read is started after address loading. It returns to high when the internal controller has finished the operation. The pin is
an open-drain driver thereby allowing two or more R/B outputs to be Or-tied. Because pull-up resistor value is related to tr(R/B) and
current drain during busy(ibusy) , an appropriate value can be obtained with the following reference chart(Fig 17). Its value can be
determined by the following guidance.
VCC
GND
Rp _ibusy
R/B
open drain output
C_L
Ready Vcc
1.8V device - VOL : 0.1V, VOH : VCCq-0.1V
3.3V device - VOL : 0.4V, VOH : 2.4V
VOH
VOL
Busy
tf
tr
Device
Figure 17. Rp vs tr ,tf & Rp vs ibusy
@ Vcc = 1.8V, Ta = 25°C , C_L = 30pF
Ibusy
300n
3m
200n
100n
1.7
2m
tr ^0.85
90
120
30
60
0.57 _0.43
1m
1.7 _tf
1.7
1.7
1.7
1K
2K
3K
4K
Rp(ohm)
Rp value guidance
300n
200n
100n
@ Vcc = 3.3V, Ta = 25°C , C_L = 100pF
2.4
400
Ibusy
1.2
300
3m
200
0.8
2m
tr
100
0.6
1m
3.6 _tf
3.6
3.6
3.6
1K
2K
3K
4K
Rp(ohm)
VCC(Max.) - VOL(Max.)
Rp(min, 1.8V part) =
=
IOL + ΣIL
1.85V
3mA + ΣIL
VCC(Max.) - VOL(Max.)
Rp(min, 3.3V part) =
=
IOL + ΣIL
3.2V
8mA + ΣIL
where IL is the sum of the input currents of all devices tied to the R/B pin.
Rp(max) is determined by maximum permissible limit of tr
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