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K9F1208Q0A Datasheet, PDF (38/39 Pages) Samsung semiconductor – 512Mb/256Mb 1.8V NAND Flash Errata
K9F5608U0C-VCB0,VIB0,FCB0,FIB0
K9F5608Q0C-DCB0,DIB0,HCB0,HIB0
K9F5608U0C-YCB0,YIB0,PCB0,PIB0
K9F5608U0C-DCB0,DIB0,HCB0,HIB0
K9F5616Q0C-DCB0,DIB0,HCB0,HIB0
K9F5616U0C-YCB0,YIB0,PCB0,PIB0
K9F5616U0C-DCB0,DIB0,HCB0,HIB0
FLASH MEMORY
READY/BUSY
The device has a R/B output that provides a hardware method of indicating the completion of a page program, erase and random
read completion. The R/B pin is normally high but transitions to low after program or erase command is written to the command reg-
ister or random read is started after address loading. It returns to high when the internal controller has finished the operation. The pin
is an open-drain driver thereby allowing two or more R/B outputs to be Or-tied. Because pull-up resistor value is related to tr(R/B)
and current drain during busy(ibusy) , an appropriate value can be obtained with the following reference chart(Fig 17). Its value can
be determined by the following guidance.
VCC
GND
Rp ibusy
R/B
open drain output
CL
Ready Vcc
1.8V device - VOL : 0.1V, VOH : VCCq-0.1V
3.3V device - VOL : 0.4V, VOH : 2.4V
VOH
VOL
Busy
tf
tr
Device
Fig 17 Rp vs tr ,tf & Rp vs ibusy
@ Vcc = 1.8V, Ta = 25°C , CL = 30pF
@ Vcc = 3.3V, Ta = 25°C , CL = 100pF
Ibusy
300n
2.4
400
Ibusy
3m
300n
1.2
300
3m
200n
100n
1.7
tr 0.85
30
60
1.7 tf
1.7
90
0.57
1.7
120
0.43
1.7
2m
200n
1m
100n
200
0.8
2m
tr
100
0.6
1m
3.6 tf
3.6
3.6
3.6
1K
2K
3K
4K
Rp(ohm)
1K
2K
3K
4K
Rp(ohm)
Rp value guidance
VCC(Max.) - VOL(Max.)
Rp(min, 1.8V part) =
=
IOL + ΣIL
1.85V
3mA + ΣIL
VCC(Max.) - VOL(Max.)
Rp(min, 3.3V part) =
=
IOL + ΣIL
3.2V
8mA + ΣIL
where IL is the sum of the input currents of all devices tied to the R/B pin.
Rp(max) is determined by maximum permissible limit of tr
37