K9F1208Q0A Datasheet, PDF (19/39 Pages) Samsung semiconductor – 512Mb/256Mb 1.8V NAND Flash Errata

K9F5608U0C-VCB0,VIB0,FCB0,FIB0
K9F5608Q0C-DCB0,DIB0,HCB0,HIB0
K9F5608U0C-YCB0,YIB0,PCB0,PIB0
K9F5608U0C-DCB0,DIB0,HCB0,HIB0
K9F5616Q0C-DCB0,DIB0,HCB0,HIB0
K9F5616U0C-YCB0,YIB0,PCB0,PIB0
K9F5616U0C-DCB0,DIB0,HCB0,HIB0
FLASH MEMORY
System Interface Using CE don’t-care.
For an easier system interface, CE may be inactive during the data-loading or sequential data-reading as shown below. The internal
528byte/264word page registers are utilized as seperate buffers for this operation and the system design gets more flexible. In addi-
tion, for voice or audio applications which use slow cycle time on the order of u-seconds, de-activating CE during the data-loading
and reading would provide significant savings in power consumption.
Figure 6. Program Operation with CE don’t-care.
CLE
CE
CE don’t-care
WE
ALE
I/Ox
CE
WE
80h Start Add.(3Cycle)
tCS
tCH
tWP
Data Input
CE
RE
I/O0~15
Data Input
10h
tCEA
tREA
tOH
out
Figure 7. Read Operation with CE don’t-care.
CLE
CE
On K9F5608U0C_Y,P or K9F5608U0C_V,F
CE must be held
low during tR
CE don’t-care
RE
ALE
R/B
WE
I/Ox
tR
00h Start Add.(3Cycle)
Data Output(sequential)
18