S6B33A2 Datasheet, PDF (33/67 Pages) Samsung semiconductor – 128 RGB Segment & 129 Common Driver For 4,096 Color STN LCD

S6B33A2 PRELIMINARY VER 1.3 128 RGB SEGMENT & 129 COMMON DRIVER FOR 4,096 COLOR STN LCD
DCDC Clock Division (24H)
This instruction sets the internal booster clock frequency.
D/I
/WR
/RD
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
1
0
0
1
0
0
0
0
1
0
0
DIV(2)
0
0
DIV(1)
DIV(1) : DC-DC Charge Pump Division Ratio in Normal Mode Display and Partial Display Mode0
- DIV(1) = 10 (Initial status)
DIV(2) : Division Ratio in Partial Display Mode1
- DIV(2) = 10 (Initial status)
DB5
DB4
DIV(2)
DB1
DB0
0
0
fPCK = fOSC/2x
0
0
0
1
fPCK = fOSC/4x
0
1
1
0
fPCK = fOSC/6x
1
0
1
1
fPCK = fOSC/8x
1
1
Note: fOSC = ( ROUNDUP (Duty/3) + dummy) x 4 x 4 x frame frequency
DIV(1)
fPCK = fOSC/2x
fPCK = fOSC/4x
fPCK = fOSC/6x
fPCK = fOSC/8x
DC/DC and AMP ON/OFF Set (26H)
This instruction set up the DC/DC and Op-amp in common start up setting.
D/I
/WR
/RD
DB7
DB6
DB5
DB4
DB3
0
0
1
0
0
1
0
0
0
AMP : Built-in OP-AMP ON/OFF.
- AMP=0 :OP-AMP OFF(Initial status)
- AMP=1 :OP-AMP ON
DCDC1: Built-in 1^st Booster ON/OFF (Initial status)
- DCDC1= 0: 1^st Booster OFF (Initial status)
- DCDC1= 1: 1^st Booster ON
DCDC2: Built-in 1^st Booster ON/OFF (Initial status)
- DCDC2= 0: 2^nd Booster OFF (Initial status)
- DCDC2= 1: 2^nd Booster ON
DCDC3: Built-in 1^st Booster ON/OFF (Initial status)
- DCDC3= 0: 3^rd Booster OFF (Initial status)
- DCDC3= 1: 3^rd Booster ON
0
0
0
AMP
DB2
1
DCDC3
DB1
1
DCDC2
DB0
0
DCDC1
29