S6B33A2 Datasheet, PDF (15/67 Pages) Samsung semiconductor – 128 RGB Segment & 129 Common Driver For 4,096 Color STN LCD

S6B33A2 PRELIMINARY VER 1.3 128 RGB SEGMENT & 129 COMMON DRIVER FOR 4,096 COLOR STN LCD
Name
/RST
PS
MPU[1:0]
/CS1
CS2
D/I
/WR
(R/W)
/RD
(E)
DB[15:8]
DB[7]/SDI
DB[6]/SCL
DB[5:0]
CDIR
Table 4. MPU Interface Pins
I/O
Description
I
Reset input pin.
When /RST is “L”, initialization is executed.
MPU interface select pin
PS MPU[1] MPU[0]
Description
H
L
L
8080-series 8bit interface
H
L
I
H
H
H
8080-series 16bit interface
L
6800-series 8bit interface
H
H
H
6800-series 16bit interface
L
L
X
3 pin SPI(Write only)
L
H
X
4 pin SPI(Write only)
Chip select input pins
I Data / instruction I/O is enabled only when /CS1 is “L” and CS2 is “H”. When chip
select is non-active, DB0 to DB15 may be high impedance.
Data / Instruction select input pin
I − D/I = “H”: DB0 to DB15 are display data
− D/I = “L”: DB0 to DB7 are instruction data
Read / Write execution control pin
PS MPU MPU Type /WR
Description
Read/Write control input pin
I
H
H
6800-series R/W − R/W = “H”: read
− R/W = “L”: write
Write enable clock input pin
H
L
8080-series /WR The data on DB0 to DB15 are latched at the
rising edge of the /WR signal.
Read / Write execution control pin
MPU[1] MPU type /RD
Description
Read / Write control input pin
I
H
6800-
series
− R/W = “H”: When E is “H”, DB0 to DB15
E
are in an output status.
− R/W = “L”: The data on DB0 to DB15 are
latched at the falling edge of the E signal.
L
8080-
series
Read enable clock input pin
/RD When /RD is “L”, DB0 to DB15 are in an output
status.
-DB[15:0]: 16-bit bi-directional data bus.
I/O -SDI: Serial data input pin. The data is latched at the rising edge of SCL.
-SCL: Serial clock input pin.
I Common direction select pin.
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