S6B33A2 Datasheet, PDF (17/67 Pages) Samsung semiconductor – 128 RGB Segment & 129 Common Driver For 4,096 Color STN LCD

S6B33A2 PRELIMINARY VER 1.3 128 RGB SEGMENT & 129 COMMON DRIVER FOR 4,096 COLOR STN LCD
FUNCTIONAL DESCRIPTION
MPU INTERFACE
Chip Select Input
There are /CS1 and CS2 pins for chip selection. The S6B33A2 can interface with an MPU only when /CS1 is “L” and
CS2 is “H”. When these pins are set to any other combination, D/I, /RD, and /WR inputs are disabled and DB0 to
DB15 are to be high impedance. And, in case of serial interface, the internal shift register and the counter are reset.
Parallel/Serial Interface
The S6B33A2 has four types of interface with an MPU, which are two serial and two parallel interfaces. This parallel
or serial interface is determined by PS pin as shown in Table9.
Table 9. Parallel / Serial Interface Mode.
PS
MPU[1]
/CS1
CS2
MPU bus type
L
H
/CS1
CS2
H
8080-Series MPU
6800-Series MPU
L
L
/CS1
CS2
H
3–Pin SPI
4-Pin SPI
Parallel Interface (PS=”H”)
The 8-bit/16-bit bi-directional data bus is used in parallel interface. The type of MPU is selected by MPU[1] and the
mode of data-bus is controlled by MPU[0] as shown in below. In accessing internal registers (D/I = “L”), only DB[7:0]
are valid.
MPU[1]
L
H
MPU[0]
L
H
L
H
Table 10. Microprocessor Selection for Parallel Int erface
/CS1
/CS1
/CS1
CS2
/RD
/WR
Data Bus
DB[7:0]
CS2
E
R/W
DB[15:0]
DB[7:0]
CS2
/RD
/WR
DB[15:0]
MPU bus type
8080-series MPU
6800-series MPU
Table 11. Parallel Data Transfer
6800-series
8080-series
D/I
/RD
/WR
/RD
/WR
Description
H
H
H
L
H
Read display data
H
H
L
H
L
Write display data
L
H
H
L
H
Read out internal status register
L
H
L
H
L
Write instruction data
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