K4D263238M Datasheet, PDF (2/19 Pages) Samsung semiconductor – 1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL

K4D263238M
Revision History
Revision 1.3 (August 2, 2001)
• Removed K4D263238M-QC40 with VDD&VDDQ=2.8V
• Changed VDD&VDDQ of K4D263238M-QC45 from 2.8V to 2.5V.
• Changed tCK(max) from 7ns to 10ns.
128M DDR SDRAM
Revision 1.2 (July 12, 2001)
• Corrected CAS latency of K4D263238M-QC45 from CL3 to CL4
• The specification for the 222MHz/250MHz is preliminary one.
Revision 1.1 (March 5, 2000)
• Added K4D263238M-QC40 with VDD&VDDQ=2.8V
• Changed VDD/VDDQ of K4D263238M-QC45 from 2.5V to 2.8V. Accordingly, DC current characteristics values have been changed.
- Changed CAS latency of K4D263238M-QC45 from CL4 to CL3.
• Changed tWPREH of K4D263238M-QC50 from 0.3tCK to 0.25tCK
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Rev. 1.3 (Aug. 2001)