K4D263238M Datasheet, PDF (16/19 Pages) Samsung semiconductor – 1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL

K4D263238M
128M DDR SDRAM
AC CHARACTERISTICS (I)
Parameter
Row cycle time
Symbol
tRC
-45*
Min
Max
13
-
-50
Min
Max
12
-
-55
Min
Max
12
-
-60
Min
Max
10
-
Refresh row cycle time
tRFC
15
-
14
-
14
-
12
-
Row active time
tRAS
9
100K
8
100K
8
100K
7
100K
RAS to CAS delay for Read tRCDRD
4
-
4
-
4
-
3
-
RAS to CAS delay for Write tRCDWR
2
2
2
-
2
-
Row precharge time
tRP
4
-
4
-
4
-
3
-
Row active to Row active
tRRD
2
-
2
-
2
-
2
-
Last data in to Row precharge tWR
2
-
2
-
2
-
2
-
Last data in to Read com-
mand
tCDLR
2
-
2
-
2
-
2
-
Col. address to Col. address tCCD
1
-
1
-
1
-
1
-
Mode register set cycle time tMRD
2
-
2
-
2
-
2
-
Auto precharge write recovery
+ Precharge
tDAL
6
-
6
-
6
-
5
-
Exit self refresh to read com- _tXSR
200
-
200
-
200
-
200
-
Power down exit time
Refresh interval time
tPDEX
1tCK+tIS
-
1tCK+tIS
-
1tCK+tIS
-
1tCK+tIS
-
tREF
7.8
-
7.8
-
7.8
-
7.8
-
Note :1 For normal write operation, even numbers of Din are to be written inside DRAM
Unit Note
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK 1
tCK 1
tCK
tCK
tCK
tCK
ns
us
- 16 -
Rev. 1.3 (Aug. 2001)