DS_K7N803645B Datasheet, PDF (12/18 Pages) Samsung semiconductor – 256Kx36 & 512Kx18-Bit Pipelined NtRAMTM

K7N803645B
K7N801845B
256Kx36 & 512Kx18 Pipelined NtRAM^TM
SLEEP MODE
SLEEP MODE is a low current, power-down mode in which the device is deselected and current is reduced to ISB2. The duration of
SLEEP MODE is dictated by the length of time the ZZ is in a High state.
After entering SLEEP MODE, all inputs except ZZ become disabled and all outputs go to High-Z
The ZZ pin is an asynchronous, active high input that causes the device to enter SLEEP MODE.
When the ZZ pin becomes a logic High, ISB2 is guaranteed after the time tZZI is met. Any operation pending when entering SLEEP
MODE is not guaranteed to successful complete. Therefore, SLEEP MODE (READ or WRITE) must not be initiated until valid pend-
ing operations are completed. similarly, when exiting SLEEP MODE during tPUS, only a DESELECT or READ cycle should be given
while the SRAM is transitioning out of SLEEP MODE.
SLEEP MODE ELECTRICAL CHARACTERISTICS
(VDD,VDDQ=2.5V ±5%)
DESCRIPTION
CONDITIONS
Current during SLEEP MODE
ZZ ≥ VIH
ZZ active to input ignored
ZZ inactive to input sampled
ZZ active to SLEEP current
ZZ inactive to exit SLEEP current
SYMBOL
ISB2
tPDS
tPUS
tZZI
tRZZI
MIN MAX
60
2
2
2
0
UNITS
mA
cycle
cycle
cycle
SLEEP MODE WAVEFORM
K
ZZ
Isupply
All inputs
(except ZZ)
tPDS
ZZ setup cycle
tZZI
ISB2
Deselect or Read Only
Outputs
(Q)
High-Z
tPUS
ZZ recovery cycle
tRZZI
Deselect or Read Only
Normal
operation
cycle
DON′T CARE
- 12 -
Nov 2003
Rev 3.0