K4D64163HF Datasheet, PDF (10/16 Pages) Samsung semiconductor – 1M x 16Bit x 4 Banks Double Data Rate Synchronous DRAM

K4D64163HF
64M DDR SDRAM
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Voltage on any pin relative to Vss
VIN, VOUT
-0.5 ~ 3.6
Voltage on VDD supply relative to Vss
VDD
-1.0 ~ 3.6
Voltage on VDD supply relative to Vss
VDDQ
-0.5 ~ 3.6
Storage temperature
TSTG
-55 ~ +150
Power dissipation
PD
1.0
Short circuit current
IOS
50
Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
POWER & DC OPERATING CONDITIONS(SSTL_2 In/Out)
Recommended operating conditions(Voltage referenced to VSS=0V, TA=0 to 65°C)
Parameter
Device Supply voltage
Symbol
Min
Typ
Max
Unit
VDD
3.135
3.3
3.465
V
Output Supply voltage
Reference voltage
VDDQ
2.375
2.50
2.625
V
VREF
0.49*VDDQ
-
0.51*VDDQ
V
Termination voltage
Vtt
VREF-0.04
VREF
VREF+0.04
V
Input logic high voltage
VIH(DC)
VREF+0.15
-
VDDQ+0.30
V
Input logic low voltage
VIL(DC)
-0.30
-
VREF-0.15
V
Output logic high voltage
VOH
Vtt+0.76
-
-
V
Output logic low voltage
VOL
-
-
Vtt-0.76
V
Input leakage current
IIL
-5
-
5
uA
Output leakage current
IOL
-5
-
5
uA
Unit
V
V
V
°C
W
mA
Note
1
1
2
3
4
5
IOH=-15.2mA
IOL=+15.2mA
6
6
Note : 1. Under all conditions VDDQ must be less than or equal to VDD.
2. VREF is expected to equal 0.50*VDDQ of the transmitting device and to track variations in the DC level of the same. Peak to
peak noise on the VREF may not exceed + 2% of the DC value. Thus, from 0.50*VDDQ, VREF is allowed + 25mV for DC error
and an additional + 25mV for AC noise.
3. Vtt of the transmitting device must track VREF of the receiving device.
4. VIH(max.)= VDDQ +1.5V for a pulse width and it can not be greater than 1/3 of the cycle rate.
5. VIL(mim.)= -1.5V for a pulse width and it can not be greater than 1/3 of the cycle rate.
6. For any pin under test input of 0V < VIN < VDD is acceptable. For all other pins that are not under test VIN=0V.
- 10 -
Rev. 1.1(Aug. 2002)