BU9888FV-W Datasheet, PDF (5/17 Pages) Rohm – High Reliability Serial EEPROMs

BU9888FV-W
●Pin assignment
Vcc TEST2 TEST1 GND
BU9888FV-W: SSOP-B8
Technical Note
●Pin function
Pin name
CS
SK
DI
DO
TEST1
TEST2
Vcc
GND
●Block diagram
I/O
Input
Input
Input
Output
Input
-
-
-
Fig.23
CS SK DI DO
Pin assignment diagram
Function
Chip select input
Serial clock input
Serial data input
Serial data output
Test pin. Please connect to power.
Test pin. Please open at using.
Power source
All input / output reference voltage, 0V
Command decode
CS
Control
Clock generation
SK
Power source voltage detection
Write
prohibition
High voltage occurrence
DI
Command
register
DO
Dummy bit
Address
buffer
8bit
Address
decoder
8bit
Data
register
16bit
R/W
amplifier
16bit
4,096bit
EEPROM
Fig.24 Block diagram
●Command mode
Command
Read (READ)
(*1)
Start bit
1
Ope code
10
Write enable (WEN)
1
00
Write (WRITE)
(*2)
1
01
Write disable (WDS)
1
00
・Input the address and the data in MSB first manners.
・As for ＊, input either VIH or VIL.
Address
Data
A7, A6, A5, A4, A3, A2,A1, A0 D15～D0(READ DATA)
1 1 ＊＊＊＊＊＊
A7, A6, A5, A4, A3, A2, A1, A0 D15～D0(WRITE DATA)
0 0 ＊＊＊＊＊＊
*Start bit
Acceptance of all the commands of this IC starts at recognition of the start bit.
The start bit means the first “1” input after the rise of CS.
*1As for read, by continuous SK clock input after setting the read command, data output of the set address starts, and
address data in significant order are sequentially output continuously. (Auto increment function)
*2When the read and the write all commands are executed, data written in the selected memory cell is automatically
deleted, and input data is written.
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5/16
2011.01 - Rev.A