BU9888FV-W Datasheet, PDF (11/17 Pages) Rohm – High Reliability Serial EEPROMs

BU9888FV-W
Technical Note
5) READY / BUSY status display (DO terminal)
(common to BR93L46-W / A46-WM,BR93L56-W / A56-WM, BR93L66-W / A66-WM, BR93L76-W / A76-WM, BR93L86-W /
A86-WM)
This display outputs the internal status signal. When CS is started after tCS (Min.200ns)
from CS fall after write command input, “H” or “L” is output.
R / B display=“L” ( BUSY ) = write under execution
(DO status）
After the timer circuit in the IC works and creates the period of tE/W, this time circuit completes automatically.
And write to the memory cell is made in the period of tE/W, and during this period, other command is not accepted.
R / B display = “H” (READY) = command wait status
(DO status）
Even after tE/W (max.5ms) from write of the memory cell, the following command is accepted.
Therefore, CS=“H” in the period of tE/W, and when input is in SK, DI, malfunction may occur, therefore, DI=“L” in the
area
CS=“H”. (Especially, in the case of shared input port, attention is required.)
* Do not input any command while status signal is output.
Command input in BUSY area is cancelled, but command input in READY area is accepted.
Therefore, status READY output is cancelled, and malfunction and mistake write may be made.
CS
STATUS
SK
CLOCK
DI
WRITE
INSTRUCTION
DO ^High-Z
tSV
READY
BUSY
Fig.41 R / B status output timing chart
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© 2011 ROHM Co., Ltd. All rights reserved.
11/16
2011.01 - Rev.A