BU9832GUL-W Datasheet, PDF (5/14 Pages) Rohm – Silicon Monolithic Integrated Circuit

◇SYNCHRONOUS DATA TIMING
CSB
SCK
SI
SO
tCS
tCSS
tSCKS
tSCKWL tSCKWH
tDIS tDIH
Hi-Z
Fig.4 DATA INPUT TIMING
tRC
tFC
SI data is latched into the chip at the rising edge of SCK clock.
Address and data must be transferred from MSB.
tCS
CSB
tCSH tSCKH
SCK
SI
tPD
tOH
SO
tRO,tFO
tOZ
Hi-Z
Fig.5 INPUT AND OUTPUT TIMING
SO data toggles at the falling edge of SCK clock.
Output data toggles from MSB.
"H"
CSB
"L"
SCK
tHFS
tHFH
SI
n+1
tHOZ
SO
Dn+1
Dn
tHRS
tHRH
tDIS
n
tHPD
Hi-Z
Dn
n-1
Dn-1
HOLDB
Fig.6 HOLD TIMING
AC Condition
Parameter
Symbol
Specification
MIN
TYP
MAX
Unit
Load Capacitance 1
CL1
-
-
100
pF
Load Capacitance 2
CL2
-
-
30
pF
Input Rise times
-
-
-
50
ns
Input Fall times
-
-
-
50
ns
Input Pulse Voltage
-
0.2Vcc/0.8Vcc
V
Input and Output
-
0.3Vcc/0.7Vcc
V
Timing Reference Voltages
5/13
REV. B