BU9873 Datasheet, PDF (23/40 Pages) Rohm – I2C BUS Serial Interface RTC with High-precision Oscillation Adjustment

BU9873
Datasheet
6-2. Periodic Interrupt Output
Besides the alarm interrupts function, the periodic interrupt is also outputted from INTRB terminal. If more than one signal is
triggered at the same time, the output becomes a NOR waveform of these signals. Further, by reading data from CTFG bit
(internal address Fh), it is possible to check the state of interrupt function.
CTFG
0
1
Periodic Interrupt Flag Bit
Description
Periodic Interrupt output=OFF (“H”)
Periodic Interrupt output=ON (“L”)
Default
This bit is set to “1” when periodic interrupt pulses are output (“L”). The CTFG bit may be set only to “0” in the interrupt level
mode. Setting this bit to “0” sets the INTRB to OFF (“H”). When this bit is set to “1”, nothing happens.
7. Test Bit
The TEST bit is for shipment testing in the factory. Please always set TEST = 0. If this bit is set to “1” accidentally, it will be
reset to “0” after stop condition is input.
Test Bit
TEST
0
normal mode
1
test mode
Description
Default
8. ±30 Second Adjust Function
±30 Second Adjust Bit
ADJ
0
Ordinary operation
1
Second digit adjustment
Description
Default
The following operations are performed by setting the second ADJ bit (internal address Fh) to 1.
(1) For second digits ranging “00”to“29”seconds.
Clock counters smaller than seconds are reset and second digits are set to”00”.
(2) For second digits ranging “30”to“59”seconds.
Clock counters smaller than seconds are reset and second digits are set to”00”. Minute digits are incremented by 1.
Second digits are adjusted within122μs from writing operation to ADJ.
The ADJ bit is for write only and allows no read operation.
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