BU9873 Datasheet, PDF (11/40 Pages) Rohm – I2C BUS Serial Interface RTC with High-precision Oscillation Adjustment

BU9873
Datasheet
1. Communication Interface
This product can read/write data from I²C bus interface with 2-wires: SDA (data) and SCL (clock). Since the output of SDA
pin is open-drain, data transferring between CPU with different supply voltage is possible by adopting a pull-up resistor on
the circuit board.
1-1. I²C BUS Communication
I²C BUS data communication starts by a start condition input, and ends by a stop condition input. The data length is 8-bit,
and acknowledges signal is always required after each byte.
I²C BUS carries out data transmission between plural devices connected by 2-wires: serial data (SDA) and serial clock
(SCL). Among these devices, there is “master” that generates clock and control the start and end signal, and “slave” that is
controlled by unique device address. RTC is “slave”. And the device that outputs data to bus during data transferring is
called “transmitter”, and the device that receives data is called “receiver”.
SDA
1-7
8
9
SCL
S
START ADDRESS R/W ACK
condition
1-7
8
9
DATA
ACK
1-7
8
9
DATA
P
ACK STOP
condition
Figure 17. I²C BUS communication
1-2. Start Condition (start bit recognition)
Before executing any command, start condition (start bit) is necessary, where SDA goes from “H” down to “L” when
SCL is “H”.
This IC always detects whether SDA and SCL are in start condition (start bit) or not, therefore, unless this condition is
satisfied, no command will be executed.
1-3. Stop Condition (stop bit recognition)
Every command can be ended by stop condition (stop bit), where SDA rising from “L” to “H” when SCL is “H”.
1-4. Acknowledge (ACK) Signal
・This acknowledge (ACK) signal is a software rule to judge whether data transfer has been executed successfully or not. For
master and slave, the device (µ-COM during inputting slave address of write command, read command, and this IC during
outputting data of read command) at the transmitter side releases the bus after outputting 8-bit data.
・The device (this IC during inputting slave address of write command, read command, and µ-COM during outputting data of
read command) at the receiver side sets SDA “L” during the ninth clock cycle, and outputs acknowledge signal (ACK)
showing that it has received the 8-bit data.
・This IC outputs acknowledge signal (ACK) “L” after recognizing start condition and 8-bit slave address.
・Every write action outputs acknowledge signal (ACK) “L” after receiving 8-bit data (word address and write data).
・Every read action outputs 8-bit data (read data), and detects acknowledge signal (ACK) “L”. When acknowledge signal
(ACK) is detected, and stop condition is not sent from the master (µ-COM) side, this IC will continue to output data. When
acknowledge signal (ACK) is not detected, this IC will stop data transfer, and end read action after recognizing stop
condition (stop bit). Then, this IC will get in off-status.
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13.Sep.2013 REV.001