BD9E303EFJ-LB Datasheet, PDF (22/31 Pages) Rohm – Over-Current Protection

BD9E303EFJ-LB
Datasheet
PCB Layout Design
In buck DC/DC converters, a large pulsed current flows in two loops. The first loop is the one into which the current flows
when the High Side FET is turned on. The flow starts from the input capacitor CIN, runs through the FET, inductor L and
output capacitor COUT and back to ground of CIN via ground of COUT. The second loop is the one into which the current flows
when the Low Side FET is turned on. The flow starts from the Low Side FET, runs through the inductor L and output capacitor
COUT and back to ground of the Low Side FET via ground of COUT. Tracing these two loops as thick and short as possible
allows noise to be reduced for improved efficiency. It is recommended to connect the input and output capacitors, in
particular, to the ground plane. The PCB layout has a great influence on the DC/DC converter in terms of all of the heat
generation, noise and efficiency characteristics.
V_IN
C_IN
MOS FET
L
V_OUT
C_OUT
Figure 46. Current Loop of Buck Converter
Accordingly, design the PCB layout with particular attention paid to the following points.
 Provide the input capacitor as close to the VIN terminal as possible on the same plane as the IC.
 If there is any unused area on the PCB, provide a copper foil plane for the ground node to assist in heat dissipation
from the IC and the surrounding components.
 Switching nodes such as SW are susceptible to noise due to AC coupling with other nodes. Trace to the inductor as
thick and as short as possible.
 Provide lines connected to FB and COMP as far as possible from the SW node.
 Provide the output capacitor away from the input capacitor in order to avoid the effect of harmonic noise from the
input.
GND
VIN
COUT
VOUT
CIN
CBOOT
L
SW
R1
C2
R3
R2
EN
Top Layer
Bottom Layer
Figure 47. Example of Sample Board Layout Pattern
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TSZ02201-0J3J0AJ00650-1-2
13.Feb.2015 Rev.002