BD9E303EFJ-LB Datasheet, PDF (20/31 Pages) Rohm – Over-Current Protection

BD9E303EFJ-LB
Datasheet
5. Phase Compensation
A current mode control buck DC/DC converter is a one-pole, one-zero system. The poles are formed by an error amplifier
and the one load and the one zero point is added by the phase compensation. The phase compensation resistor R_CMP
determines the crossover frequency F_CRS(15kHz (Typ)) where the total loop gain of the DC/DC converter is 0 dB. The high
value of this crossover frequency F_CRS provides a good load transient response characteristic but inferior stability.
Conversely, specifying a low value for the crossover frequency F_CRS greatly stabilizes the characteristics but the load
transient response characteristic is impaired.
(1) Selection of Phase Compensation Resistor R_CMP
The phase compensation resistance R_CMP can be determined by using the following equation.
R _CMP
2π
V_OUT F_CRS C _OUT
V _FB G _MP G _MA
[Ω]
where :
V_OUT is the output voltage
F_CRS is the crossover frequency
C_OUT is the output capacitance
V_FB is the feedback reference voltage (1.0 V (Typ))
G _MP is the current sense gain (9A/V (Typ))
G _MA is the error amplifier transconductance (150 μA/V (Typ))
(2) Selection of phase compensation capacitance C_CMP
For stable operation of the DC/DC converter, inserting a zero point under 1/9 of the zero crossover frequency cancels
the phase delay due to the pole formed by the load often, thus, providing favorable characteristics.
The phase compensation capacitance C_CMP can be determined by using the following equation.
C _CMP  _2π
1
R_CMP
F_Z
[F]
where
F_Z 　 is the Zero point inserted
* In case CCMP calculation result above exceeds 15000pF, set the value of compensation capacitance CCMP for use
to15000pF. Setting too large CCMP value may cause startup failure, etc.
(3) Loop stability
In order to secure stability of DC/DC converter, confirm there is enough phase margin on actual equipment.
Under the worst condition, it is recommended to secure phase margin more than 45°.
In practice, the characteristics may vary depending on PCB layout, routing of wiring, types of parts to use and
operating environments (temperature, etc.).
Use gain-phase analyzer or FRA to confirm frequency characteristics on actual equipment. Contact the manufacturer
of each measuring equipment to check its measuring method, etc.
In case these measuring equipment are not available, there is a way to deduce phase margin degree from load
response.
Monitor the fluctuation of output voltage when unloaded condition is changed to maximum loaded condition. It can be
said that responsiveness is low when fluctuation is significant, and that phase margin degree is small when ringing
is made many times after the condition change. Normally, ringing is made 2 times or more as standard.
However, this method cannot confirm a quantitative phase margin degree.
Load
Maximum load
Output voltage
0
Inadequate phase margin
Adequate phase margin.
t
Figure 44. Load Response
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TSZ22111•15•001
20/28
TSZ02201-0J3J0AJ00650-1-2
13.Feb.2015 Rev.002