BU26154MUV Datasheet, PDF (21/89 Pages) Rohm – High PSRR is attained by built-in regulator

BU26154MUV
Datasheet
2 wire serial interface
This LSI has 2 wire serial interfaces. The LSI operates as a slave device. The address is fixed at “0011010”.
- Format
The followings are the protocol of the LSI.
Write (MSB first)
Start Condition (Set SDA level from “H” to “L” during SCL=“H”)
Slave Address (0011010) +W (0) (8bit)
Write Address (8bit)
Write Data (8bit)
…
Stop Condition (Set SDA level from “L” to “H” during SCL=“H”)
Read (MSB first)
Start Condition
Slave Address (0011010) +W (0) (8bit)
Read Address (8bit)
(Stop Condition) Start Condition
Slave Address (0011010) +R (1) (8bit)
Read Data (8bit)
The following shows the wave form of the LSI.
The yellow gridding shows that slave device drives the bus.
The symbol in the wave form means as following table.
Write
Unit
W/R
A
A[7-0]
D[7-0]
Description
0: It is Read Write 1
0: ACK(Acknowledge) 1: NAK(Not Acknowledge)
Address (8bit)
Data(8bit)
slave address reception
Access address reception
Write data reception
SCL
Start 0 1 2 3 4 5 6 7 8 _{0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8}
SDA
0 0 1 1 0 1 0 W A A7 A6 A5 A4 A3 A2 A1 A0 A D7 D6 D5 D4 D3 D2 D1 D0 A
Continued
from the
above
Writedata reception
Write data reception
Write data reception
8 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 Stop
A D7 D6 _{D5 D4 D3 D2} D1 D0 A _{D7 D6 D5 D4 D3 D2 D1 D0} A _{D7 D6 D5 D4 D3 D2 D1 D0} A
Internal write
Internal write
Internal write
Figure 24
In case there is no Stop or Start condition after internal register is written (Above figure: Internal Write), the slave device
becomes continuous write mode and the next received 8 bits of data will be written into the internal register addressed by
incremented by two to the current address.
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