BU26154MUV Datasheet, PDF (12/89 Pages) Rohm – High PSRR is attained by built-in regulator

BU26154MUV
Datasheet
Power Supply Sequence
Please power on/off the LSI with all kind of power at the same time.
Each power supply should power up/down in 50ms. Also, keep all power supply in the ON state or the OFF state.
Please avoid partial ON or partial OFF states.
Please keep RESETB pin “L” level until all power supply become ON state. The CPU I/F become available when all power
supply is powered on after t_{W_PURST} and t_{W_REGU} time exceeds.
HVDD must be powered on first, but HVDD must be powered off last. About SPVDD, there is no limitation above.
Parameter
Symbol Min Typ Max Unit
Power On Delay Time
t_{VDD_ON}
0
- 50 ms
Power Off Delay Time
t_{VDD_OFF}
0
- 50 ms
Reset Time after Power ON
t_{w_PURST}
1
-
- μs
Wait Time for Regulator Starting after Reset
Release
t_{w_REGU}
1
-
- ms
HVDD
Power
supply
Other
Power
supply
REGOUT
RESETB
CPU I/F
STATUS
PowerSupply*0.9
tVDD_ON
PowerSupply*0.9
tW_PURST tW_REGU
PowerSupply*0.1
t_{VDD_OFF}
PowerSupply*0.1
not available
VDD OFF
PowerDown
Wait
Regulator
available
Operation
not available
VDD OFF
Figure 12
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TSZ02201-0V1V0R501570-1-2
23.Jun.2014 Rev.001