BD9361GUL Datasheet, PDF (17/27 Pages) Rohm – 6ch Internal Power MOSFET System Switching Regulator + 1ch LDO

BD9361GUL
●SLAVE address
●Resister map
SLAVE address
29h (010 1001)
Attention
¾
¾
¾
¾
“W” is resister bit to write.
“R” is resister bit to read.
“R/W” is resister bit to read or write.
“－” is resister bit not to use.
Addr
ess
Address
name
R/W
D7
D6
D5
D4
00h SFTRST W
-
-
-
-
01h ENCNT R/W -
-
-
-
02h VCNT12 R/W
VCNT2[3:0]
03h VCNT34 R/W
04h ^VCNT6L R/W
DO
※※h Æ See resister map
-
VCNT4[2:0]
LDOCNT[2:0]
D3
D2
D1
-
CH1
PFM
-
-
EN
EN6
LDO
VCNT1[3:0]
VCNT3[3:0]
VCNT6[4:0]
D0
SFT
RST
EN5
Initial
value
00h
08h
64h
※8h
60h
Function
Input to reset
software
ON/OFF for
each CH
Adjustment to CH1,
CH2 output voltage
Adjustment to CH3,
CH4 output voltage
Adjustment to INV6,
LDO output voltage
Resister reset condition ： (Resister reset mean all resister turn into initial value)
① In the operation of HX2BAT UVLO or VCCOUT UVLO.
② Initialized after OFF sequence of CH1～4.
Logic reset condition ： Logic reset mean all resister and internal logic circuit (soft start circuit etc.) are initialized in disregard of
sequence with the following condition directly.
① In the operation of HX2BAT UVLO or VCCOUT UVLO.
② Initialized CH1～4 output voltage are OFF with OFF sequence.
Please input “0” to “-“ resister. Empty resisters are used to test mode resister.
Please transmit “0” to “-“ resister to avoid test mode while data is transmitted.
If address “00h” get “01” data, it occur logic reset directly, address “00h” is initialized, and start-up sequence is beginning.
Don’t use this mode, if you don’t need.
●Resister Map 1
Address
00h
Address _R/W
name
SFT
RST ^W
D0: SFTRST
D7
D6
D5
D4
D3
D2
D1
-
-
-
-
-
-
-
software reset
‘0’: Reset cancel (Initial)
‘1’: reset Æ Reset automatically by 1 shot pulse.
D0
SFT
RST
Initial
value
00h
Data content
Input to reset
software
Address
Address
name
ENCN
01h
T
D0: EN5
R/W
R/W
D2: ENLDO
D7
D6
D5
D4
-
-
-
-
CH5 ON/OFF signal
‘0’: CH5 OFF (initial value)
‘1’: CH5 ON
LDO ON/OFF signal
‘0’: LDO OFF (initial value)
‘1’: LDO ON
D3
D2
D1
CH1P ENLD
FM
O
EN6
D1: EN6
D0
Initial
value
Data content
EN5 08h
ON/OFF for
each CH
CH6 ON/OFF signal
‘0’: CH6 OFF (initial value）
‘1’: CH6 ON
D3: CH1PFM
CH1 PFM mode switch signal
‘0’: CH1 synchronous mode
‘1’: CH1 reverse current detect mode (initial value)
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17
TSZ22111・14・001
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001