BDXXFC0WEFJ Datasheet, PDF (15/20 Pages) Rohm – Low saturation with PDMOS output

BDxxFC0WEFJ series
Datasheet
18. Regarding input pins of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
PN junctions are formed at the intersection of these P layers with the N layers of other elements, creating parasitic diodes
and/or transistors. For example (refer to the Figure below):
○When GND > Pin A and GND > Pin B, the PN junction operates as a parasitic diode
○When GND > Pin B, the PN junction operates as a parasitic transistor
Parasitic diodes occur inevitably in the structure of the IC, and the operation of these parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
(Pin A)
(Pin B)
B
C
E
(Pin B)
BC
P+
P
P+
N
P+
P
P+
E
GND
N
N
N
N
P
Parasitic elements
N
N
P substrate
(Pin A)
Parasitic elements
or transistors
GND
Parasitic elements
or transistors
GND
Parasitic elements
Example of Simple Monolithic IC Architecture
www.rohm.com
・ ・ ^{© 2013 ROHM Co., Ltd. All rights reserved.}
TSZ22111 15 001
15/17
TSZ02201-0R6R0A600480-1-2
2013.08.27 Rev.001