BDXXFC0WEFJ Datasheet, PDF (12/20 Pages) Rohm – Low saturation with PDMOS output

BDxxFC0WEFJ series
Datasheet
●Operational Notes
1. Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings (such as the input voltage or operating temperature range) may
result in damage to the IC. Assumptions should not be made regarding the state of the IC (e.g., short mode or open
mode) when such damage is suffered. If operational values are expected to exceed the maximum ratings for the device,
consider adding protective circuitry (such as fuses) to eliminate the risk of damaging the IC.
2. Electrical characteristics described in these specifications may vary, depending on temperature, supply voltage, external
circuits, and other conditions. Therefore, be sure to check all relevant factors, including transient characteristics.
3. GND potential
The potential of the GND pin must be the minimum potential in the system in all operating conditions.
Ensure that no pins are at a voltage below the GND at any time, regardless of transient characteristics.
4. Ground wiring pattern
When using both small-signal and large-current GND traces, the two ground traces should be routed separately but
connected to a single ground potential within the application in order to avoid variations in the small-signal ground caused
by large currents. Also, ensure that the GND traces of external components do not cause variations on GND voltage. The
power supply and ground lines must be as short and thick as possible to reduce line impedance.
5. Inter-pin shorts and mounting errors
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in
damage to the IC. Shorts between output pins or between output pins and the power supply or GND pins (caused by
poor soldering or foreign objects) may result in damage to the IC.
6. Operation in strong electromagnetic fields
Using this product in strong electromagnetic fields may cause IC malfunction. Caution should be exercised in applications
where strong electromagnetic fields may be present.
7. Testing on application boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance pin may subject the IC to
stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be
turned off completely before connecting or removing it from a jig or fixture during the evaluation process. To prevent
damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.
8. Power Dissipation Pd
Using the unit in excess of the rated power dissipation may cause deterioration in electrical characteristics including
× × ^{reduced current capability due to the rise of chip temperature. The mentioned power dissipation in the absolute maximum}
rating of this specification, at HTSOP-J8 package when 70mm 70mm 1.6mm glass epoxy board is mounted, is the
value of when there is no heat dissipation board. And in case this exceeds, take the measures like enlarge the size of
board; make copper foil area for heat dissipation big; and use dissipation board and do not exceed the power dissipation.
9. Thermal consideration
≧ ^{Use a thermal design that allows for a sufficient margin in light of the Pd in actual operating conditions. Consider Pc that}
does not exceed Pd in actual operating conditions. (Pd Pc)
℃) ℃ Tjmax : Maximum junction temperature=150( , Ta : Peripheral temperature( ) ,
℃ θja : Thermal resistance of package-ambience( /W), Pd : Package Power dissipation (W),
Pc : Power consumption (W), Vcc : Input Voltage, VOUT : Output Voltage, IOUT : Load, Icc : Circut Current
Package Power dissipation
Power consumption
: Pd (W) = (Tjmax-Ta) / θja
: Pc (W) = (Vcc-VOUT)×IOUT+Vcc×Icc
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・ ・ ^{© 2013 ROHM Co., Ltd. All rights reserved.}
TSZ22111 15 001
12/17
TSZ02201-0R6R0A600480-1-2
2013.08.27 Rev.001