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BDXXFC0WEFJ Datasheet, PDF (13/20 Pages) Rohm – Low saturation with PDMOS output | |||
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BDxxFC0WEFJ series
Datasheet
â§ â§ â¦ ï¼ â§ 10.Vcc pin
Insert a capacitor (VOUT 5.0V:capacitor 1µF, 1.0 VOUT 5.0V:capacitor 2.2µF) between the Vcc and GND pins.
Choose the capacitance according to the line between the power smoothing circuit and the VCC pin. Selection of the
capacitance also depends on the application. Verify the application and allow for sufficient margins in the design. It is
recommended to use a capacitor with excellent voltage and temperature characteristics.
Electric capacitor
IC
Ceramic capacitor, Low ESR capacitor
11. Output pin
In order to prevent oscillation, a capacitor needs to be placed between the output pin and GND pin. We recommend a
⦠⦠capacitor with a capacitance of more than 1µF(3.0V VOUT 15.0V). Electrolytic, tantalum and ceramic capacitors can be
⦠used. We recommend a capacitor with a capacitance of more than 4.7µF(1.0V VOUT<3.0V). Ceramic capacitors can be
⦠⦠used. When selecting the capacitor, ensure that the capacitance of more than 1µF(3.0V VOUT 15.0V) or more than
⦠4.7µF(1.0V VOUT<3.0V) is maintained at the intended applied voltage and temperature range. Due to changes in
temperature, the capacitance can fluctuate possibly resulting in oscillation. For selection of the capacitor, refer to the
Cout_ESR vs IOUT data. The stable operation range given in the reference data is based on the standalone IC and
resistive load. For actual applications, the stable operating range is influenced by the PCB impedance, input supply
impedance, and load impedance. Therefore, verification of the final operating environment is needed.
When selecting a ceramic type capacitor, we recommend using X5R, X7R, or better, with excellent temperature and
DC-biasing characteristics and high voltage tolerance.
Also, in case of rapidly changing input voltage and load current, select the capacitance in accordance with verifying that
the actual application meets the required specification.
⦠⦠⦠⦠4.0V Vcc 26.5V
â⦠⦠â -25 Ta +85
3.0V VOUT
⦠⦠5k⦠R2 10k⦠(BD00FC0WEFJ)
⦠⦠Cin=2.2µF Cin 100µF
⦠⦠1µF Cout 100µF
15.0V
⦠⦠⦠⦠4.0V Vcc 26.5V 3.0V VOUT 15.0V
â⦠⦠â ⦠⦠-25 Ta +85
0A IOUT 1A
⦠⦠5k⦠R2 10k⦠(BD00FC0WEFJ)
100
100
Unstable operating region
10
ï¼
Cout_ESR(Ω
1
0.1
Stable operating region
ï¼
ï¼ 10
Stable operating region
⦠⦠⦠⦠6.0V Vcc 26.5V 5.0V VOUT 15.0V
â⦠⦠â ⦠⦠-25 Ta +85
0A IOUT 1A
⦠⦠5k⦠R2 10k⦠(BD00FC0WEFJ)
100
ï¼
ï¼ 10
Stable operating region
0.01
0.001
0
200
400
600
800
1000
2.2
Unstable
operating region
1
1
10
1
100
1
10
100
IOIUoT((m mAA))
Coutï¼ÂµFï¼
Cout(µF)
Cout_ESR vs IOUT (reference data)
Cin vs Cout (reference data)
⦠⦠4.0V Vcc 26.5V
⦠1.0V VOUT<1.5V
â⦠⦠â -25 Ta +85
⦠⦠5k⦠R2 10k⦠(BD00FC0WEFJ)
⦠⦠2.2µF Cin 100µF
⦠⦠4.7µF Cout 100µF
100
⦠⦠4.0V Vcc 26.5V
⦠1.5V VOUT<3.0V
â⦠⦠â -25 Ta +85
⦠⦠5k⦠R2 10k⦠(BD00FC0WEFJ)
⦠⦠2.2µF Cin 100µF
⦠⦠4.7µF Cout 100µF
100
⦠⦠4.0V Vcc 26.5V
⦠1.0V VOUT<3.0V
â⦠⦠â ⦠⦠-25 Ta +85
0A IOUT 1A
⦠⦠5k⦠R2 10k⦠(BD00FC0WEFJ)
100
10
ï¼
Cout_ESR(Ω
1
0.5
0.1
0.01
Unstable operating region
Stable operating region
10
ï¼
Cout_ESR(Ω
1
0.1
0.01
Unstable operating region
Stable operating region
ï¼
Unstable
ï¼ 10 operating region
Stable
operating region
2.2
0.001
0
200
400
600
800
1000
0.001
0
200
400
600
800
1000
IOUITo(m(mAA))
IIoO(UmT(Am) A)
Cout_ESR vs IOUT (reference data)
1
1
4.7
10
100
Coutï¼ÂµFï¼
Cin vs Cout (reference data)
www.rohm.com
㻠㻠© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111 15 001
13/17
TSZ02201-0R6R0A600480-1-2
2013.08.27 Rev.001
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