BU9832GUL-W_12 Datasheet, PDF (14/30 Pages) Rohm – WLCSP EEPROM

BU9832GUL-W (8Kbit)
Datasheet
●Features
○Status registers
This IC has status registers. The status registers are of 8 bits and express the following parameters.
BP0 and BP1 can be set by write status register command. These 2 bits are memorized into the EEPROM, therefore are
valid even when power source is turned off.
Rewrite characteristics and data hold time are same as characteristics of the EEPROM.
WEN can be set by write enable command and write disable command. WEN becomes write disable status when power
―
source is turned off. R/B is for write confirmation, therefore cannot be set externally.
The value of status register can be read by read status command.
●Status registers
Product number bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
―
BU9832GUL-W
WPEN 0
0
0
BP1 BP0 WEN R/B
bit
Memory
location
Function
WP pin enable / disable designation bit
WPEN EEPROM _{WPEN=0=invalid}
WPEN=1=valid
Contents
This enables / disables the functions of WP
pin.
BP1
BP0
EEPROM EEPROM write disable block designation bit
This designates the write disable area of
EEPROM. Write designation areas of product
numbers are shown below.
WEN
R/B
Register
Write and write status register write
enable / disable status confirmation bit
WEN=0=prohibited
WEN=1=permitted
Register
Write cycle status (READY / BUSY) status
confirmation bit
R / B =0=READY
R / B =1=BUSY
●Write disable block setting
BP1
BP0
0
0
Write disable block
None
0
1
300h-3FFh
1
0
200h-3FFh
1
1
000h-3FFh
○ WP pin
By setting WP =LOW, write command is prohibited. As for BU9832GUL-W when WPEN bit is set “1”, the WP pin
functions become valid. And the write command to be disabled at this moment is WRSR.
However, when write cycle is in execution, no interruption can be made.
Product number
BU9832GUL-W
WRSR
Prohibition possible but WPEN bit “1”
WRITE
Prohibition impossible
○ HOLD pin
By HOLD pin, data transfer can be interrupted. When SCK=”1”, by making HOLD from “1” into”0”, data transfer to
EEPROM is interrupted. When SCK = “0”, by making HOLD from “0” into “1”, data transfer is restarted.
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TSZ22111・15・001
14/26
TSZ02201-0R2R0G100410-1-2
30.AUG.2012 Rev.001