BU97540KV-M Datasheet, PDF (11/70 Pages) Rohm – Multi-function Segment Drivers

BU97540KV-M
2. 1/4 Duty
(1) When SCL is stopped at the low level
(a) Master
SCE
SCL
SDI 1
1
1
0
0
0
1
0 D1 D2 D3 D4 --- D94 D95 D96 0
0
0
0
0
0
0
0
0
0 --- 0 DR SS DT0 DT1 KM0 KM1 KM2 P0 P1 P2 P3 FL FC0 FC1 FC2 FC3 OC SC BU0 BU1 BU2 0
0
0
Device Address
8 bits
Display Data
96 bits
Control Data
54 bits
DD
2 bits
SCE
SCL
SDI 1
1
1
0
0
0
1
0 D97 D98 D99 D100 --- D190 D191 D192 0
0
0
0
0
0
0
0
0
0 --- 0
0 SSC 0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 PG9 PF0 PF1 PF2 PF3 PF4 CT0 CT1 CT2 CT3 0
0
1
Device Address
8 bits
Display Data
96 bits
Control Data
54 bits
DD
2 bits
SCE
SCL
SDI 1
1
1
0
0
0
1
0 D193 D194 --- D271 D272 0 --- 0
0
0
0
0
0
0
0
0
0
0 --- 0
0 WN10 WN11 --- WN17 WN18 WN20 WN21 --- WN27 WN28 WN30 WN31 --- WN37 WN38 WN40 WN41 --- WN47 WN48 0
1
0
Device Address
8 bits
Display Data
80 bits
Control Data
70 bits
DD
2 bits
SCE
SCL
SDI 1
1
1
0
0
0
1
0
0
0
0
0 --- 0
0
0
0
0
0
0
0
0
0
0 WN50 WN51 --- WN57 WN58 WN60 WN61 --- WN67 WN68 WN70 WN71 --- WN77 WN78 WN80 WN81 --- WN87 WN88 WN90 WN91 --- WN97 WN98 0
1
1
Device Address
8 bits
Control Data
150 bits
DD
2 bits
(Note8)
(b) Slave
SCE
SCL
SDI 0 0 0 1 0 0 1 0 D1 D2 D3 D4 --- D94 D95 D96 0 0 0 0 0 0 0 0 0 0 --- 0 DR SS DT0 DT1 KM0 KM1 KM2 P0 P1 P2 P3 FL FC0 FC1 FC2 FC3 OC SC BU0 BU1 BU2 0 0 0
Device Address
8 bits
Display Data
96 bits
Control Data
54 bits
DD
2 bits
SCE
SCL
SDI 0 0 0 1 0 0 1 0 D97 D98 D99 D100 --- D190 D191 D192 0 0 0 0 0 0 0 0 0 0 --- 0 0 SSC 0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 PG9 PF0 PF1 PF2 PF3 PF4 CT0 CT1 CT2 CT3 0 0 1
Device Address
8 bits
Display Data
96 bits
Control Data
54 bits
DD
2 bits
SCE
SCL
SDI 0 0 0 1 0 0 1 0 D193 D194 --- D283 D284 0 --- 0 0 0 0 0 0 0 0 0 0 0 --- 0 0 WN10 WN11 --- WN17 WN18 WN20 WN21 --- WN27 WN28 WN30 WN31 --- WN37 WN38 WN40 WN41 --- WN47 WN48 0 1 0
Device Address
8 bits
Display Data
92 bits
Control Data
58 bits
DD
2 bits
SCE
SCL
SDI 0 0 0 1 0 0 1 0 0 0 0 0 --- 0 0 0 0 0 0 0 0 0 0 0 WN50 WN51 --- WN57 WN58 WN60 WN61 --- WN67 WN68 WN70 WN71 --- WN77 WN78 WN80 WN81 --- WN87 WN88 WN90 WN91 --- WN97 WN98 0 1 1
Device Address
8 bits
Control Data
150 bits
DD
2 bits
(Note8)
(Note8) DD is direction data.
Figure 9. 3-SPI Data Transfer Format
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
11/66
TSZ02201-0P4P0D300970-1-2
29.Jun.2015 Rev.002