M16C_11 Datasheet, PDF (99/112 Pages) Renesas Technology Corp – televisions, household appliances, office equipment, communication devices

M16C/65C Group
5. Electrical Characteristics
Memory Expansion Mode and Microprocessor Mode
(in no wait state setting)
Read timing
BCLK
CSi
td(BCLK-CS)
30ns(max.)
tcyc
th(BCLK-CS)
0ns(min.)
V_CC1 = V_CC2 = 3V
ADi
BHE
ALE
RD
DBi
Write timing
BCLK
CSi
td(BCLK-AD)
30ns(max.)
td(BCLK-ALE) th(BCLK-ALE)
25ns(max.)
-4ns(min.)
th(BCLK-AD)
0ns(min.)
th(RD-AD)
0ns(min.)
td(BCLK-RD)
30ns(max.)
th(BCLK-RD)
0ns(min.)
tac1(RD-DB)
(0.5 × tcyc-60)ns(max.)
Hi-Z
tsu(DB-RD)
60ns(min.)
th(RD-DB)
0ns(min.)
td(BCLK-CS)
30ns(max.)
tcyc
th(BCLK-CS)
0ns(min.)
ADi
BHE
ALE
WR, WRL,
WRH
DBi
td(BCLK-AD)
30ns(max.)
th(BCLK-AD)
0ns(min.)
td(BCLK-ALE)
25ns(max.)
th(BCLK-ALE)
-4ns(min.)
td(BCLK-WR)
30ns(max.)
th(WR-AD)
(0.5 × tcyc-15)ns(min.)
th(BCLK-WR)
0ns(min.)
Hi-Z
td(BCLK-DB)
40ns(max.)
tcyc =
1
f(BCLK)
td(DB-WR)
th(WR-DB)
(0.5 × tcyc-40)ns(min.) (0.5 × tcyc-25)ns(min.)
Measuring conditions
y VCC1 = VCC2 = 3V
y Input timing voltage: VIL = 0.6 V, VIH = 2.4 V
y Output timing voltage: VOL = 1.5 V, VOH = 1.5 V
Figure 5.30 Timing Diagram
R01DS0015EJ0100 Rev.1.00
Feb 07, 2011
Page 99 of 109