HD404449 Datasheet, PDF (99/125 Pages) Hitachi Semiconductor – HD404449 SERIES

HD404449 Series
A/D Converter
The MCU has a built-in A/D converter that uses a sequential comparison method with a resistor ladder. It
can measure four analog inputs with 8-bit resolution. As shown in the block diagram of figure 81, the A/D
converter has a 4-bit A/D mode register, a 1-bit A/D start flag, and a 4-bit plus 4-bit A/D data register.
AN₀
AN₁
AN₂
AN₃
AV_CC
Internal bus line (S2)
4
A/D mode register
(AMR)
2
2
A/D start flag
(ADSF)
+
COMP
–
Control logic
Internal bus line (S1)
4
4
A/D data register
(ADRU, ADRL)
8
IFAD
A/D interrupt
request flag
Encoder
AV_SS
D/A
8
Operating mode signal (set to 0 in stop mode,
watch mode, and subactive mode)
Figure 81 A/D Converter Block Diagram
A/D Mode Register (AMR: $016): Four-bit write-only register which selects the A/D conversion period
and indicates analog input pin information. Bit 0 of the A/D mode register selects the A/D conversion
period, and bits 2 and 3 select a channel, as shown in figure 82.
A/D Start Flag (ADSF: $020, Bit 2): One-bit flag that initiates A/D conversion when set to 1. At the
completion of A/D conversion, the converted data is stored in the A/D data register and the A/D start flag is
cleared. Refer to figure 86.
A/D Data Register (ADRL: $017, ADRU: $018): Eight-bit read-only register consisting of a 4-bit lower
digit and 4-bit upper digit. This register is not cleared by reset. After the completion of A/D conversion,
the resultant eight-bit data is held in this register until the start of the next conversion (figures 83, 84, and
85).
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