HD404449 Datasheet, PDF (48/125 Pages) Hitachi Semiconductor – HD404449 SERIES

HD404449 Series
Ports R5₁–R5₃ are multiplexed with peripheral function pins SCK₂, SI₂, SO₂, respectively. The function
modes of these pins can be selected by individual pins, by 2A setting bit 3 (SM2A3) of serial mode register
2A (SM2A: $01B), and bits 2 and 3 (PMRA2, PMRA3) of port mode register A (PMRA: $004) (figures 36
and 37).
Pull-Up MOS Transistor Control: A program-controlled pull-up MOS transistor is provided for each
input/output pin other than input-only pins D₁₂ and D₁₃. The on/off status of all these transistors is
controlled by bit 3 (MIS3) of the miscellaneous register (MIS: $00C), and the on/off status of an individual
transistor can also be controlled by the port data register (PDR) of the corresponding pin—enabling on/off
control of that pin alone (table 23 and figure 38).
The on/off status of each transistor and the peripheral function mode of each pin can be set independently.
How to Deal with Unused I/O Pins: I/O pins that are not needed by the user system (floating) must be
connected to V_CC to prevent LSI malfunctions due to noise. These pins must either be pulled up to V_CC by
their pull-up MOS transistors or by resistors of about 100 kΩ.
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