HD404849 Datasheet, PDF (98/127 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404849 Series
A/D current off flag (IAOF: $021, bit 2)
Bit
Initial value
Read/Write
Bit name
3
0
R/W
RAME
2
0
R/W
IAOF
1
0
R/W
ICEF
0
0
R/W
ICSF
RAME
Refer to description of operating modes
ICEF
Refer to description of timers
IAOF (A/D current off flag)
1
Current I_AD is cut off.
0
Current I_AD flows.
ICSF
Refer to description of timers
Figure 83 A/D Current Off Flag (IAOF)
Note on Use: Use the SEM and SEMD instructions to write data to the A/D start flag (ADSF: $020, bit 2),
but make sure that the A/D start flag is not written to during A/D conversion. Data read from the A/D data
register (ADRL: $017, ADRU: $018) during A/D conversion cannot be guaranteed.
The A/D converter does not operate in the stop, watch, and subactive modes because it relies on the clock
from OSC, which is stopped in these modes. During these low-power dissipation modes, current through
the resistor ladder is cut off to decrease the power input.
The port data register (PDR) is initialized to 1 by an MCU reset. At this time, if pull-up MOS is selected as
active by bit 3 of the miscellaneous register (MIS3), the port will be pulled up to V_CC. When using a shared
R port/analog input pin as an input pin, clear PDR to 0. Otherwise, if pull-up MOS is selected by MIS3 and
PDR is set to 1, a pin selected by bit 1 of the A/D mode register as an analog pin will remain pulled up.
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