HD404849 Datasheet, PDF (11/127 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404849 Series
HD404848
0
RAM mapped register
$000
HD4048412, HD404849, HD4074849
0
$000
RAM mapped register
64 _{Memory register (16 digits)} $040 64 _{Memory register (16 digits)} $040
80
$050 80
$050
Not used
Not used
92
$05C 92
$05C
LCD display area (32 digits)
LCD display area (32 digits)
124
$07C 124
$07C
Not used
Not used
144
$090 144
$090
Data (400 digits)
Data (464 digits × 2) ^{* 1}
V = 0 (bank 0)
V = 1 (bank 1)
544
960
1023
Not used
Stack (64 digits)
$220 ₆₀₈
752
$3C0 ₉₆₀
$3FF 1023
Data (144 digits)
Not used
Stack (64 digits)
$260
$2F0
$3C0
$3FF
Notes: R: Read only
W: Write only
R/W: Read/write
1. The data area has two banks:
bank 0 (V = 0) and bank 1 (V = 1)
$090
Data
(464 digits)
V=0
(bank = 0)
Data
(464 digits)
V=1
(bank = 1)
$25F
2. Two registers are mapped to the
same address (at $00A, $00B,
$00E, $00F, $011, and $012)
0
Interrupt control bits area
3
$000
$003
4 Port mode register A
(PMRA) W $004
5 Serial mode register A
(SMRA) W $005
6 Serial data register lower
(SRL) R/W $006
7 Serial data register upper
(SRU) R/W $007
8 Timer mode register A
(TMA) W $008
9 Timer mode register B1
(TMB1) W $009
10
11 ^Timer-B
(TRBL/TWBL) R/W $00A
*2
(TRBU/TWBU) R/W $00B
12 Miscellaneous register
(MIS) W $00C
13 Timer mode register C1
(TMC1) W $00D
14
15 ^Timer-C
(TRCL/TWCL) R/W $00E
(TRCU/TWCU) R/W $00F
16 Timer mode register D1
(TMD1) W $010
17
18 ^Timer-D
(TRDL/TWDL) R/W $011
(TRDU/TWDU) R/W $012
19 Timer mode register B2
(TMB2) R/W $013
20 Timer mode register C2
(TMC2) R/W $014
21 Timer mode register D2
(TMD2) R/W $015
22 A/D mode register
(AMR) W $016
23 A/D data register lower
(ADRL) R $017
24 A/D data register upper
(ADRU) R $018
Not used
27 LCD control register
28 LCD mode register
(LCR) W $01B
(LMR) W $01C
Not used
31 LCD output register 3
(LOR3) W $01F
32
$020
Register flag area
35
$023
36 Port mode register B
(PMRB) W $024
37 Port mode register C
(PMRC) W $025
38 Edge sense select register 1 (ESR1) W $026
39 Edge sense select register 2 (ESR2) W $027
40 Serial mode register B
(SMRB) W $028
41 System clock select register (SSR) W $029
Not used
44 Port D0 to D3 DCR
45 Port D4 to D7 DCR
46 Port D8 DCR
Not used
48 Port R0 DCR
49 Port R1 DCR
50 Port R2 DCR
51 Port R3 DCR
(DCD0) W $02C
(DCD1) W $02D
(DCD2) W $02E
(DCR0) W $030
(DCR1) W $031
(DCR2) W $032
(DCR3) W $033
Not used
54 Port R6 DCR
55 Port R7 DCR
(DCR6) W $036
(DCR7) W $037
63 V register
Not used
(V) W $03F
10 Timer read register B lower (TRBL) R Timer write register B lower (TWBL) W $00A
11 Timer read register B upper (TRBU) R Timer write register B upper (TWBU) W $00B
14 Timer read register C lower (TRCL) R Timer write register C lower (TWCL) W $00E
15 Timer read register C upper (TRCU) R Timer write register C upper (TWCU) W $00F
17 Timer read register D lower (TRDL) R Timer write register D lower (TWDL) W $011
18 Timer read register D upper (TRDU) R Timer write register D upper (TWDU) W $012
Figure 2 RAM Memory Map
9