English
Language : 

R8A66593FPBG_15 Datasheet, PDF (91/144 Pages) Renesas Technology Corp – ASSP (USB2.0 Peripheral Controller)
R8A66593FP/BG
3.3 Pipe Control
Table 3.9 provides a list of pipe settings for the controller. In USB data transfers, data transmission is executed in logic
pipes called endpoints. The R8A66593 controller comes with nine pipes for data transfer. Each pipe can be set to meet
the requirements of the user system.
Table 3.9 Pipe Settings
Register
Name
PIPESEL
Bit Name
PIPESEL
DCPCFG
PIPECFG
TYPE
BFRE
DBLB
CNTMD
DIR
EPNUM
SHTNAK
PIPEBUF BUFSIZE
BUFNMB
DCPMAXP
PIPEMAXP
PIPEPERI
MXPS
IFIS
IITV
DCPCTR
PIPExCTR
BSTS
INBUFM
ATREPM
Setting Description
Comments
Specifies the pipe number
for setting the PIPEBU,
PIPEMAXP, PIPEPERI
registers
Specifies the transfer type
Selects BRDY interrupt
mode
Selects single or double
buffer
Selects continuous
transfer or
non-continuous transfer
Selects transfer direction
(read or write)
Endpoint number
Disables pipe when
transfer is completed.
Buffer memory size
Buffer memory number
Maximum packet size
Refer to 2.16.1 more details.
.
Refer to 2.16.2 for more details.
PIPE1-5: can be set
Refer to 2.16.3, 3.4.3.4, and 3.4.3.5 for more details.
PIPE1-5: can be set
Refer to 2.16.4 and 3.4.1.4 for more details.
PIPE1-2: can be set (in bulk transfer setting only)
PIPE3-5: can be set
For continuous send/receive, set the buffer size in multiples of
the payload.
Refer to 2.16.5 and 3.4.1.5 for more details.
Set to IN or OUT
Refer to 2.16.7 and 3.4.2.1 for more details.
Refer to 2.16.8 for more details.
DCP: can be set
PIPE 1-2: can be set (in bulk transfer setting only)
PIPE 3-5: can be set
Refer to 2.16.6 for more details.
DCP: cannot be set (fixed at 256 bytes)
PIPE1-5 can be set (set in 64 byte units up to a max of 2K bytes)
PIPE6-9: cannot be set (fixed at 64 bytes)
Refer to 2.16.9 and 3.4.1 for more details.
DCP: cannot be set (fixed at areas 0-3)
PIPE1-5: can be set (between areas 8 and 135 (0x87)
PIPE6-9: cannot be set (fixed at areas 4-7)
Refer to 2.6.10 and 3.4.1 for more details.
Refer to 2.16.11 and 3.3.1 for more details.
Buffer flash
Interval counter
Buffer Status
IN buffer monitor
Auto response mode
PIPE1-2: can be set (in isochronous transfer setting only)
PIPE3-9: cannot be set
Refer to 2.16.12 and 3.9.5 for more details.
PIPE1-2: can be set (in isochronous transfer setting only)
PIPE3-9: cannot be set
Refer to 2.16.13 and 3.9.3 for more details.
Refer to 2.17.1 and 3.4.1.1 for more details.
Refer to 2.17.2 and 3.4.1.1 for more details.
PIPE1-5: can be set
ACLRM
SQCLR
SQSET
SQMON
PBUSY
PID
Auto buffer clear
Sequence toggle bit clear
Sequence toggle bit set
Sequence toggle bit
confirm
Confirm pipe busy
Response PID
Can be enabled and disabled when buffer memory is
read-enabled
Refer to 2.17.4 and 2.17.11 for more details.
Clear data toggle bit
Refer to 2.17.5 and 3.3.4 for more details..
Set data toggle bit
Refer to 2.17.6 and 3.3.4 for more details.
Confirm data toggle bit
Refer to 2.17.7 and 3.3.4 for more details.
Refer to 2.17.8 for more details.
Refer to 2.17.9 and 3.3.2 for more details..
R19DS0071EJ0101 Rev1.01
Jun 28,2013
Page 91 of 142