PD3719_15 Datasheet, PDF (9/22 Pages) Renesas Technology Corp – MOS INTEGRATED CIRCUIT

µPD3719
INPUT PIN CAPACITANCE (TA = +25 °C, VOD = VRD = 15 V)
Parameter
Symbol Pin name Pin No. MIN. TYP. MAX. Unit
Shift register clock pin capacitance 1
Cφ1
φ1
13
1600
pF
24
1600
pF
Shift register clock pin capacitance 2
Cφ2
φ2
12
1600
pF
25
1600
pF
Reset gate clock pin capacitance
CφRB
φRB
5
15
pF
Reset feed-through level clamp clock pin capacitance CφCLB
φCLB
31
15
pF
Transfer gate clock pin capacitance
CφTG
φTG
23
200
pF
Remark Pins 13 and 24 (φ1), 12 and 25 (φ2) are each connected inside of the device.
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