PD3719_15 Datasheet, PDF (7/22 Pages) Renesas Technology Corp – MOS INTEGRATED CIRCUIT

µPD3719
ABSOLUTE MAXIMUM RATINGS (TA = +25 °C)
Parameter
Output drain voltage
Reset drain voltage
Shift register clock voltage
Reset gate clock voltage
Reset feed-through level clamp clock voltage
Transfer gate clock voltage
Operating ambient temperature
Storage temperature
Symbol
VOD
VRD
Vφ1, Vφ2
VφRB
VφCLB
VφTG
TA
Tstg
Ratings
Unit
–0.3 to +16
V
–0.3 to +16
V
–0.3 to +8
V
–0.3 to +8
V
–0.3 to +8
V
–0.3 to +8
V
–25 to +60
°C
–40 to +100
°C
Caution Exposure to ABSOLUTE MAXIMUM RATINGS for extended periods may affect device reliability;
exceeding the ratings could cause permanent damage. The parameters apply independently.
RECOMMENDED OPERATING CONDITIONS (TA = +25 °C)
Parameter
Symbol
Output drain voltage
VOD
Reset drain voltage
VRD
Shift register clock high level
Vφ1H, Vφ2H
Shift register clock low level
Vφ1L, Vφ2L
Reset gate clock high level
VφRBH
Reset gate clock low level
VφRBL
Reset feed-through level clamp clock high level VφCLBH
Reset feed-through level clamp clock low level VφCLBL
Transfer gate clock high level
VφTGH
Transfer gate clock low level
VφTGL
Data rate
fφRB
MIN.
14.0
14.0
4.5
–0.3
4.5
–0.3
4.5
–0.3
4.5
–0.3
–
TYP.
15.0
VOD
5.0
0
5.0
0
5.0
0
Vφ1H^Note
0
1
MAX.
16.0
VOD
5.5
+0.5
5.5
+0.5
5.5
+0.5
Vφ1H^Note
+0.3
2
Unit
V
V
V
V
V
V
V
V
V
V
MHz
Note When Transfer gate clock high level (VφTGH) is higher than Shift register clock high level (Vφ1H), Image lag
can increase.
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