HAT3021R_15 Datasheet, PDF (9/13 Pages) Renesas Technology Corp – Silicon N/P Channel Power MOS FET Power Switching

HAT3021R
• P Channel
Power vs. Temperature Derating
4.0
Test Condition :
When using the glass epoxy board
(FR4 40x40x1.6 mm), PW < 10 s
3.0
2.0
1.0
0
50
100
150
200
Ambient Temperature Ta (°C)
Typical Output Characteristics
–5.0
-10 V
-4.5 V
-3.0 V
–2.5
V_GS = -2.8 V
Pulse Test
0
–5
–10
Drain to Source Voltage V_DS (V)
Drain to Source Saturation Voltage vs
–1000
Gate to Source Voltage
Pulse Test
–800
–600
–400
I_D = –2 A
–200
–1 A
–0.5 A
0
–4 –8 –12 –16 –20
Gate to Source Voltage V_GS (V)
Maximum Safe Operation Area
100
10 µs
10
1
0.1
DC
Operation in
this area is
PW ₌
Operation _(PW
1
100
ms
µ_s
10 _{ms (1shot)}
≤ ₁^N₀o_{ste) 4}
0.01 limited by R_DS(on)
Ta = 25°C
0.001 ^{1 shot Pulse}
0.1
1
10
100
Drain to Source Voltage V_DS (V)
Note 4 :
When using the glass epoxy board
(FR4 40x40x1.6 mm)
Typical Transfer Characteristics
–5
V_DS = 10 V
Pulse Test
–4
–3
–2
–1
Tc = 75°C
25°C
−25°C
0
–2 –4 –6 –8 –10
Gate to Source Voltage V_GS (V)
Static Drain to Source on State Resistance
vs. Drain Current
1000
Pulse Test
V_GS = –4.5 V
–10 V
100
10
–0.1
–1
–10
Drain Current I_D (A)
Rev.2.00, Oct.06.2004, page 7 of 10